Mingo Liu

Differential micro-Pirani gauge for monitoring MEMS wafer-level package

The implementation of differential Pirani gauge for accurately measuring wafer-level package pressures was demonstrated. We proposed a multiple-sensor-solution, where two Pirani gauges were constructed under different pressures; one in sealed micro-cavity for measuring pressures and the other one in opened micro-cavity as a reference. Ambient pressure, structural dimension variations, and resistivity differences among wafers/lots, were captured through the differential scheme for error compensations, allowing accurate pressure determinations. Presented Pirani utilized small gaps (~2μm) between heater and dual heat sinks to obtain wide operation range (0.05~100 Torr) and high sensitivity (~10000 ppm/Torr). With 5X error reductions and high stabilities, the proposed device was successfully used in examining reliabilities and monitoring processes of wafer-level packages.

The device characteristics of partially undoped poly-silicon gate P-LDMOS power transistors

The effect of partially undoped poly-silicon gate above the drift region in P-lateral double-diffused MOS (P-LDMOS) Transistors is investigated. Experiment results show that it can improve the off-state leakage current and reduce the on-state resistance. For hot carrier performance, this structure induces a higher initial current shift due to less vertical field. The long-term hot carrier degradation behavior of this device is the same as that of the standard devices.

On-state resistance improvement by partially slotted STI LDMOS transistor in 0.25-micron smart power technology

The improvement of on-state resistance with partially slotted STI (shallow trench isolation) for medium voltage power devices in an advanced 0.25 um BiCMOS-DMOS process is implemented. Experiment results show that our proposed device can reduce 20% RON without hurting breakdown voltage. The partially slotted STI structure avoids breakdown voltage to decrease and also shortens the drain current path due to a 3-dimentional electric field shaping. Careful design for slotted STI profile is needed to achieve the optimum RON-BV tradeoff performance.