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Featured researches published by Minoru Nagata.


bipolar/bicmos circuits and technology meeting | 2006

5.8 GHz RF Transceiver LSI Including On-Chip Matching Circuits

Minoru Nagata; Hideaki Masuoka; Shin-ichi Fukase; Makoto Kikuta; Makoto Morita; Nobuyuki Itoh

A fully integrated 5.8 GHz band transceiver LSI for electronic toll collection systems has been developed. The transceiver consists of LNA, down-converter, ASK detector, ASK modulator, voltage controlled oscillator, and AS-fractional-N PLL. Since internal RF matching circuitry for input terminal of LNA and output terminal of ASK modulator were also integrated, almost no external matching devices are necessary with VSWR<1.25. SBM for ASK modulator and VGA for LO amplitude control were adopted to avoid local leakage and to keep modulation linearity, result, obtained modulation index were over 95%. The infin-shape resonant coil was implemented for VCO to diminish magnetic coupling. Manufacturing process was SiGe BiCMOS process with 47 GHz cut-off frequency


asia-pacific microwave conference | 2007

Twisted Inductor VCO for Supressing On-chip Interferences

Nobuyuki Itoh; Hideaki; Masuoka; Shin-ichi Fukase; Ken-ichi Hirashiki; Minoru Nagata

Fully-symmetrical on-chip twisted inductor VCO has been studied to suppress interferences from on-chip driver amplifier in transmitter chain of integrated ETC transceivers and compared with conventional inductor VCO. Similar transceiver chips with either conventional inductor VCO or twisted inductor VCO are fabricated and are measured and the transmitter spectra of ASK modulated signals are measured. The ASK modulated 5.8 GHz transmission spectrum of the transceiver chip with the conventional inductor VCO shows USB/LSB asymmetry of 2.8 dB however, that of the transceiver chip with the twisted inductor VCO is perfectly balanced. This result shows that the twisted inductor VCO has a significant advantage in suppressing interference of integrated transceiver chip. The phase noise of 1 MHz offset from 5.8 GHz carrier, after frequency doublers, is -117 dBc/Hz, the current consumption is 4.1 mA, and FOM is 183 dB.


IEEE Transactions on Consumer Electronics | 1987

Fully integrated FM demodualator circuits for satellite TV receivers

Kazuo Hasegawa; Minoru Nagata; Yasunori Miyahara; Tsutomu Kobayashi; Hiroshi Arakawa; Kazuhiro Moroyama

Two kinds of integrated circuit are described for use in FM demodulators of satellite TV receivers. The ICs, an automatic gain control amplifier (AGC AMP) and a phase-locked demodulator, include a signal level amplifier, a driver for the first AGC circuit, an automatic frequency tuning amplifier, and a voltage regulator. The ICs were fabricated using an advanced nitride self-aligned process with 2-μm design rules. The threshold level, the differential gain, and differential phase of the FM demodulator using those ICs are 6 db, 1%, and 1°, respectively.


topical meeting on silicon monolithic integrated circuits in rf systems | 2011

Linear CMOS power amplifiers employing a novel layout configuration for improved stability and long-term reliability

Kazuhide Abe; Tadahiro Sasaki; Atsuko Iida; Kazuhiko Itaya; Koji Horie; Minoru Nagata; Tadashi Terada

This paper presents a design and characterization of linear CMOS power amplifiers employing a new layout configuration of transistors, assuming that both unstable operation known as memory effects and degradation of power transistors are caused by hot carrier effects through thermal energy accumulation and magnified impact ionization at the pinch-off channels by acoustic phonon. The new layout concept of the power transistors has been applied in a single-chip power amplifier circuit in class AB operation using 0.13 µm standard CMOS process. High-power durability tests have revealed that the transistors of the new type are free from significant degradation even in long-term continuous operations.


IEICE Transactions on Electronics | 2007

A 5.8-GHz ETC Transceiver Using SiGe-BiCMOS

Minoru Nagata; Hideaki Masuoka; Shin-ichi Fukase; Makoto Kikuta; Makoto Morita; Nobuyuki Itoh

A fully integrated 5.8 GHz ETC transceiver LSI has been developed. The transceiver consists of LNA, down-conversion MIX, ASK detector, ASK modulator, DA VCO, and ΔΣ-fractional-N PLL. The features of the transceiver are integrated matching circuitry for LNA input and for DA output, ASK modulator with VGA for local signal control to avoid local leakage and to keep suitable modulation index, and LO circuitry consisting of ΔΣ-fractional-N PLL and interference-robust oo-shape inductor VCO to diminish magnetic coupling from any other circuitry. Use of these techniques enabled realization of the input and output VSWR of less than 1.25, modulation index of over 95%, and enough qualified TX signals. This transceiver was manufactured by 1P3M SiGe-BiCMOS process with 47 GHz cut-off frequency.


Archive | 2010

Temperature compensation circuit

Koji Horie; Minoru Nagata


Archive | 1987

Differential amplification circuit

Minoru Nagata


Archive | 2001

FM signal oscillator circuit and modulation level control method

Minoru Nagata


Archive | 2011

CURRENT DETECTION CIRCUIT AND INFORMATION TERMINAL

Ken-ichi Hirashiki; Minoru Nagata


Archive | 2003

Frequency switching method, voltage controlled oscillator using same and receiver for spread spectrum communication using same

Minoru Nagata

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