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Dive into the research topics where Mirko Pasca is active.

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Featured researches published by Mirko Pasca.


IEEE Sensors Journal | 2016

An 80 mV Startup Voltage Fully Electrical DC–DC Converter for Flexible Thermoelectric Generators

Carlo Veri; L. Francioso; Mirko Pasca; Chiara De Pascali; Pietro Siciliano; S. D'Amico

This paper presents a fully electrical dc-dc converter designed for thermoelectric generator (TEG) for energy harvesting applications. The proposed flexible TEG has been achieved by a screen printing technology on a 80 μm thick common paper and thin Kapton foil and integrates 280 thermocouples for an output voltage of about 75 mV with 5 K of thermal gradient. In order to step up the voltage at the output of the thin-film flexible TEG, a dc-dc converter has been designed. This latter operates with an input voltage ranging from 80 up to 370 mV. The proposed dc-dc converter achieves an automatic control based on pulsewidth modulation, ensuring 1 V output voltage. The control circuit includes two sections. The first one provides a forward control operating in the 80-150 mV input voltage range. The second one operates a feedback control, as the output voltage of TEG is higher than 150 mV. The dc-dc converter is implemented in a 65 nm CMOS technology, achieving a 73% peak efficiency.


conference on ph.d. research in microelectronics and electronics | 2014

A 40mV start up voltage DC - DC converter for thermoelectric energy harvesting applications

Carlo Veri; Mirko Pasca; S. D'Amico; L. Francioso

A low start up voltage DC - DC converter for thermoelectric energy harvesting is presented in this paper. Output voltage of a thermoelectric energy generator (TEG) provides an output voltage from 40mV to 400mV, depending of thermal gradient. In order to increase input voltage, a boost converter is used. The proposed DC - DC converter is composed of two main sections. One provides a high duty cycle pulse width modulation for a forward control. It is used when the voltage coming from the TEG, is in the 40mV to 150mV range. As the TEG voltage it is higher than 150mV, a feedback circuit is switched on. It provides a more accurate control of the output voltage. Entire DC - DC converter is implemented in a 65nm bulk CMOS technology.


conference on ph.d. research in microelectronics and electronics | 2013

A 12dBm IIP3 reconfigurable mixer for high/low band IR-UWB receivers

Mirko Pasca; Vincenzo Chironi; S. D'Amico; Marcello De Matteis; A. Baschirotto

This paper presents a highly linear low power fully differential downconversion mixer for impulse radio ultra wideband (IR-UWB) receivers. The downconversion mixer is designed for IR-UWB IEEE 802.15.4a standard compliant receivers. It can be reconfigured according to the selected operation channel. In fact, it enables the downconversion of the #3 mandatory channel in low band (4.4928 GHz carrier frequency, 499.2 MHz channel bandwidth), or #9 mandatory channel in high band (7.9872 GHz carrier frequency, 499.2 MHz channel bandwidth), or #11 optional channel in high band (same carrier frequency of channel #9 but 1.331 GHz channel bandwidth). Linearity of the proposed mixer is improved utilizing derivative superposition method and source degenerations at the input stage. The proposed mixer has been designed in a 65 nm CMOS technology. Post layout simulations result in 12 dBm IIP3, 16.8 dB minimum noise figure while consuming 2.7 mW from 1.2 V supply voltage.


IEEE Microwave and Wireless Components Letters | 2016

High-Sensitivity CMOS RF-DC Converter in HF RFID Band

Riccardo Colella; Mirko Pasca; Luca Catarinucci; Luciano Tarricone; S. D'Amico

In this letter, a fully-integrated RF-DC converter operating at the HF RFID working frequency (13.56 MHz) and realized in 350 nm CMOS technology is presented. It is based on a Dicksons rectifier, a Pelliconis charge pump driven by a 50 kHz ring oscillator, and a voltage monitor. Mathematical model is developed and verified through simulations and measurements. Results show a sensitivity of -19 dBm with related output voltage of 0.5 V. Moreover, taking advantage from the internal voltage monitor, the suitability of the proposed architecture to pilot RFID-based sensor boards has been proved.


ieee international workshop on advances in sensors and interfaces | 2015

A −19dBm sensitivity integrated RF-DC converter with regulated output voltage for powering UHF wireless sensors

Mirko Pasca; S. D'Amico; Vincenzo Chironi; Luca Catarinucci; Danilo De Donno; Riccardo Colella; Luciano Tarricone

This paper presents a -19dBm sensitivity RF-DC converter for energy harvesting applications. It is able to harvest the energy from a dipole antenna operating at 866.5MHz (European UHF RFID frequency) providing a regulated output voltage in the range between 1.9V to 2.4V over a 2MΩ resistive load. Such voltage level is suitable to supply body sensor nodes. The four stages Dicksons RF-DC rectifier converts the UHF RF input signal to a 2V DC output, feeding the following two stages DC-DC Pelliconis charge pump. The DC-DC charge pump, powered by a 90kHz ring oscillator, is used to further step-up the RF-DC rectifier output voltage and to realize the RF to load isolation. The output voltage regulation is performed by a feedback network made by a hysteresis comparator and a Vt-based voltage reference. The RF-DC converter shows a 38% power conversion efficiency at 0dbm input power level.


international symposium on circuits and systems | 2014

A SAW-less dual-band RF front-end for IR-UWB receiver in 65nm CMOS

Vincenzo Chironi; S. D'Amico; Mirko Pasca; Marcello De Matteis; A. Baschirotto

In this paper a highly linear-dual band RF front-end (LNA and Mixer) for IR-UWB (IEEE 802.15.4a) applications is proposed. LNA exploits a common-gate (CG) stage in parallel to a common-source (CS). It performs single-ended to differential-ended operation, avoiding balun stage. It features 18 dB maximum gain, <;4 dB noise figure and +4 dBm inband third-order intermodulation intercept (IIP3). A double-peak single notch input network with a dual-band LC load is used for input matching and for WLAN (5-6 GHz) out-of-band interferers suppression resulting in +16 dBm out-of-band IIP3. This allows to remove the 5-6GHz WLAN dedicated filtering at the antenna reducing costs. The proposed mixer is a Gilbert cell and features derivative superposition method and source degenerations at the input stage to improve linearity performance showing > +11.8 dBm IIP3. The RF front-end receiver has been designed in 65nm CMOS technology consuming 13.5 mW.


aisem annual conference | 2017

Heat Sink Free Wearable Thermoelectric System with Low Startup Voltage, High Efficiency DC–DC Converter

L. Francioso; C. De Pascali; Carlo Veri; Mirko Pasca; S. D’amico; F. Casino; Pietro Siciliano

Thermoelectric energy harvesting represents a promising approach to partially or totally supply ultra-low power wearable devices, by using the human body heat as energy source. Few works were published on wearable and truly ready-to-use TEGs. The work presented in this contribute proposes development and assessment of operational properties of a system composed by a flexible heat sink free thermoelectric generator (TEG) and a DC–DC ASIC converter with 80 mV start-up input voltage. For a first functional investigation, a prototype of 45 thermocouples into a footprint area of about 2.2 × 10−3 m2 was fabricated and tested to evaluate its thermoelectric performance stand-alone and coupled with the DC–DC converter. A mean Seebeck coefficient of about 60 µV/K for pn couple was calculated from experimental data, and a power of about 27 nW was measured at 10 K on matched load of about 6.8 kΩ. A temperature difference of about 1.8 ℃ was achieved between the junctions in working conditions next to those typical of human body wearing in indoors.


international conference on electronics, circuits, and systems | 2016

A fully integrated switch capacitor step down DC-DC converter in 65nm bulk CMOS technology with peak efficiency tracking

Carlo Veri; Mirko Pasca; Giuseppe Tau; S. D'Amico

This paper presents a DC-DC converter to be embedded in the pixel front-end of detectors in Large Hadron Collider (LHC) experiment at CERN. The DC-DC converter has to operate in a hostile environment due to the radiation. Under radiation, the value of the resistances, Ron, of the MOS switches changes. In addition, the load current, Iout, can change, ranging around the nominal value of 400mA from 200mA to 600mA. Both Ron and Iout, determine the optimum frequency that maximize the efficiency. In order to improve the efficiency as the operation conditions of the DC-DC converter changes, a tracking circuit of the peak efficiency was implemented. The tracking circuit performs a closed loop control of the clock frequency of the DC-DC converter. This converter provides an 800mV output voltage from a 1.2V input supply reaching an 80.22% peak efficiency. It is integrated in 65nm bulk CMOS technology with an area of 1.31mm2.


mediterranean microwave symposium | 2015

A UHF-RFID power management circuit for body sensor networks

Mirko Pasca; Luca Catarinucci; Riccardo Colella; Danilo De Donno; Luciano Tarricone; S. D'Amico; A. Baschirotto

In this paper, a UHF-RFID power management circuit is presented. It is able to power body sensor networks nodes, starting from -25dBm UHF-RFID input signal power. It is based on an initial Dicksons RF-DC rectifier circuit, followed by an ultra-low-voltage integrated boost converter, realized in 180nm CMOS technology, that is used to further step-up of the rectified DC-voltage and to guarantee the RF-to-load isolation. Measurements demonstrate the ability of the power management circuit to provide 400mV output voltage when a -25dBm continuous wave at 866.5MHz (European UHF RFID frequency) is applied at the input.


mediterranean microwave symposium | 2015

A HF-RFID, −19 dBm sensitivity fully integrated RF-DC voltage multiplier

Mirko Pasca; Luca Catarinucci; Riccardo Colella; Danilo De Donno; Luciano Tarricone; S. D'Amico

In this paper, a RF-DC voltage multiplier operating at 13.56MHz (in the European HF RFID standard band) with -19dBm sensitivity is presented. It is made by a Dicksons RF-DC rectifier and an additional Pelliconis charge pump driven by a fully integrated 50kHz ring oscillator. Mathematical model is developed and verified through measurements. Silicon prototypes have been realized in 350nm CMOS technology. Measurements show an output voltage ranging from 0.5V up to 3.11V.

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A. Baschirotto

University of Milano-Bicocca

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L. Francioso

National Research Council

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