Mitsuru Uda

Design and fabrication of a prototype projection data monitor with high information content

A prototype 28-in.-diagonal desktop data monitor capable of displaying 2048 × 2048- pixel images has been designed, built, and evaluated. The monitor uses optical projection technology. A reflective, crystalline silicon active-matrix light valve using liquid crystal electro-optics and a digital electronic interface architecture is described. This rear-projection monitor has four million resolvable pixels, uses three light valves to achieve color, has a low-gain surface diffuser screen, and functions as a fully interactive, color personal computer monitor with motion video capability. The monitor is 20 in. deep.

40.4: Optimization of Light-Valve Mirrors

A mirror structure for reflective Si based light valves was fabricated using chemical mechanical polishing and a thin 150 nm Al(Cu)/Ti mirror to minimize hillock formation. The use of chemical-mechanical polishing planarization resulted in only a 1% loss in reflectivity from topography under the mirrors. The reflectivity for pixel sizes from 7.5–40 μm and 0.7 or 0.5 μm gaps were measured and the performance of TN LC pixels with different sizes and inversion methods are reported.

An in-line image quality monitoring system for imaging device fabrication using automated macro-inspection

An in-line image quality monitoring system using automated macro-inspection is described. One of the critical problems in reducing yield in CCD manufacture is the production of mura, regions of uneven sensitivity in the device. In this paper, an in-line mura-related yield monitor is presented using the recently developed Tokyo Aircraft Instrument Company EDIS-3000 Automated Macro-Inspection system, which has a high sensitivity and a high resolution optical module developed by IBMTM Japan. The optical module is designed to focus on reflected light from the pattern edge, not on the traditional diffracted light, so it is expected to register the linearity between the wafer CD and the wafer image. This system is expected to reduce yield loss, resulting in a faster time-to-market for imaging devices.