Mladen Mitic

Controlled shallow single-ion implantation in silicon using an active substrate for sub-20-keV ions

We demonstrate a method for the controlled implantation of single ions into a silicon substrate with energy of sub-20‐keV. The method is based on the collection of electron-hole pairs generated in the substrate by the impact of a single ion. We have used the method to implant single 14‐keV P31 ions through nanoscale masks into silicon as a route to the fabrication of devices based on single donors in silicon.

Demonstration of a silicon-based quantum cellular automata cell

We report on the demonstration of a silicon-based quantum cellular automata (QCA) unit cell incorporating two pairs of metallically doped (n+) phosphorus-implanted nanoscale dots, separated from source and drain reservoirs by nominally undoped tunnel barriers. Metallic cell control gates, together with Al–AlOx single electron transistors for noninvasive cell-state readout, are located on the device surface and capacitively coupled to the buried QCA cell. Operation at subkelvin temperatures was demonstrated by switching of a single electron between output dots, induced by a driven single electron transfer in the input dots. The stability limits of the QCA cell operation were also determined.

Surface gate and contact alignment for buried, atomically precise scanning tunneling microscopy–patterned devices

The authors have developed a complete electron beam lithography (EBL)-based alignment scheme for making multiterminal Ohmic contacts and gates to buried, planar, phosphorus-doped nanostructures in silicon lithographically patterned by scanning tunneling microscopy (STM). By prepatterning a silicon substrate with EBL-defined, wet-etched registration markers, they are able to align macroscopic contacts to buried, conducting STM-patterned structures with an alignment accuracy of ∼100nm. A key aspect of this alignment process is that, by combining a circular marker pattern with step engineering, they are able to reproducibly create atomically flat, step-free plateaus with a diameter of ∼300nm so that the active region of the device can be patterned on a single atomic Si(100) plane at a precisely known position. To demonstrate the applicability of this registration strategy, they show low temperature magnetoresistance data from a 50nm wide phosphorus-doped silicon nanowire that has been STM-patterned onto a si...

Nanofabrication processes for single-ion implantation of silicon quantum computer devices

We describe progress in nanofabrication processes for the production of silicon-based quantum computer devices. The processes are based on single-ion implantation to place phosphorus-31 atoms in accurate locations, precisely self-aligned to metal control gates. These fabrication schemes involve multi-layer resist and metal structures, electron beam lithography and multi-angled aluminium shadow evaporation. The key feature of all fabrication schemes is an integrated combination of patterns in different resist and metal layers that together define self-aligning metal gate structures as well as channels down to the substrate through which to implant the phosphorus. Central to this process is a new technique that allows for control and detection of the implantation process at a single-ion level.

Optimization of single keV ion implantation for the construction of single P-donor devices.

We report recent progress in single keV ion implantation and online detection for the controlled implantation of single donors in silicon. When integrated with silicon nanofabrication technology this forms the “top down” strategy for the construction of prototype solid state quantum computer devices based on phosphorus donors in silicon. We have developed a method of single ion implantation and online registration that employs detector electrodes adjacent to the area into which the donors are to be implanted. The implantation sites are positioned with nanometer accuracy using an electron beam lithography patterned PMMA mask. Control of the implantation depth of 20 nm is achieved by tuning the phosphorus ion energy to 14 keV. The counting of single ion implantation in each site is achieved by the detection of e-/h+ pairs produced by the implanted phosphorus ion in the substrate. The system is calibrated by use of Mn K-line x-rays (5.9 and 6.4 keV) and we find the ionization energy of the 14 keV phosphorus ions in silicon to be about 3.5-4.0 keV for implants through a 5 nm SiO2 surface layer. This paper describes the development of an improved PIN detector structure that provides more reliable performance of the earlier MOS structure. With the new structure, the energy noise threshold has been minimized to 1 keV or less. Unambiguous detection/counting of single keV ion implantation events were achieved with a confidence level greater than 98% with a reliable and reproducible fabrication process.

Measuring the Charge and Spin States of Electrons on Individual Dopant Atoms in Silicon

We review an ongoing effort to demonstrate technologies required for quantum computing with phosphorus donors in silicon. The main aspect of our research is to achieve control over charge and spin states of individual dopant atoms. This work has required the development of new techniques for engineering silicon nanodevices at the atomic level. We follow an approach for implanting single phosphorus ions into silicon substrates with integrated p–i–n detectors. Configuring our devices with radio-frequency single-electron transistors (RF-SETs) allows for charge sensing at low temperatures. In this context, we perform measurements of single-electron charge transfer between individual phosphorus donors. In a parallel effort, we employ nanoscale Schottky contacts for populating and depopulating individual dopant atoms. Of particular interest is coherent manipulation of single-electron charge and spin states on individual dopant atoms. Charge manipulation between coupled donor states may be achieved by either external microwave pumping or intrinsic tunnel coupling. Spin manipulation, on the other hand, involves magnetic resonance. In this context, we pursue electrically detected spin resonance in phosphorus-doped devices with a decreasing number of dopant atoms.

Bias spectroscopy and simultaneous single-electron transistor charge state detection of Si:P double dots.

We report a detailed study of low-temperature (mK) transport properties of a silicon double-dot system fabricated by phosphorous ion implantation. The device under study consists of two phosphorous nanoscale islands doped to above the metal-insulator transition, separated from each other and the source and drain reservoirs by nominally undoped (intrinsic) silicon tunnel barriers. Metallic control gates, together with an Al-AlO(x) single-electron transistor (SET), were positioned on the substrate surface, capacitively coupled to the buried dots. The individual double-dot charge states were probed using source-drain bias spectroscopy combined with non-invasive SET charge sensing. The system was measured in linear (source-drain DC bias V(SD) = 0) and non-linear (V(SD) ≠ 0) regimes, allowing calculations of the relevant capacitances. Simultaneous detection using both SET sensing and source-drain current measurements was demonstrated, providing a valuable combination for the analysis of the system. Evolution of the triple points with applied bias was observed using both charge and current sensing. Coulomb diamonds, showing the interplay between the Coulomb charging effects of the two dots, were measured using simultaneous detection and compared with numerical simulations.

Nanofabrication of charge-based Si:P quantum computer devices using single-ion implantation

We report on progress towards a charge-based qubit using phosphorus atoms implanted in a silicon substrate. Prototype devices have been fabricated using standard lithographic techniques together with a new method of controlled single ion implantation using on-chip detector electrodes. Positional accuracy of the implanted ions was achieved using a nanoaperture mask defined using electron beam lithography. The two implanted phosphorus atoms are positioned ~50 nm apart, to form a qubit test device. A series of process steps has been developed to repair implant damage, define surface control gates, and to define single electron transistors used for qubit readout via the detection of sub-electron charge transfer signals. Preliminary electrical measurements on these devices show single charge transfer events that are resilient to thermal cycling.