Mohammad M. Hossain

Method for Determining a Dynamical State–Space Model for Control of Thermal MEMS Devices

A method is presented for determining lumped dynamical models of thermal microelectromechanical systems (MEMS) devices for purposes of feedback control. As a case study, an electrothermal actuator is used. The physical properties and a set of assumptions are used to determine the basic structure of the dynamical model, which requires the development of the electrical, thermal, and mechanical dynamics. The importance of temperature-dependent parameters is emphasized for dynamical modeling for purposes of feedback control. To confront temperature dependence in a practical yet effective manner, an average temperature is introduced to preserve the energy balance inside the structure. This allows the development of a practical method that combines structure of the model, through the average body temperature, with finite element analysis (FEA) in novel way to perform system identification and identify the unknown parameters. The result is a lumped dynamical model of a MEMS device that can be used for the design of feedback control systems. We compare computer simulated results using the dynamical model with experimental behavior of the actual device to show that our procedure indeed generates an accurate model. This dynamical model is intended for further synthesis of driving signal and control system but also gives a qualitative insight into the relationship between devices geometry and its behavior. The method enables fast development of the model by conducting relatively few static FEA and is verifiable with dynamic experimental results even when temperature measurements are not available.

Design optimization and reliability of PWB level electronic package

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Design Optimization and Reliability of PWB Level Electronic Package

As the Electronic Packaging industry develops technologies for fabrication of smaller, faster, economical and reliable products; thermal management and design play an important role. The major part of the failures of the electronic components is temperature related. During thermal cycling, fatigue failures are caused due to mismatch of coefficient of thermal expansion (CTE) of different materials present in the components. Increased power dissipation and density in modern electronics system require efficient and intelligent design and thermal management strategies to ensure the reliability of electronic products. This paper discusses the reliability and design optimization of a generic Printed Wiring Board (PWB) level electronic package under thermal cycle loading. Finite element tool ANSYS is used to estimate the cycles to fatigue failure of solder joint of the package coupled with optimization module present in ANSYS for providing the details on determining optimal design parameters which affect the product reliability. Combining finite element analysis with optimization would significantly reduce the design time and increases the product reliability. Four model characteristics: PWB core in-plane Youngs Modulus, PWB core in-plane coefficient of thermal expansion, PWB core thickness and the stand-off solder joint height are chosen as the optimization inputs (design variables) that ensure higher reliability and improved performance of the assembled product. The objective of the optimization is to improve the fatigue life of solder joints of the package. Sub approximation, Design of Experiment (DoE) and Central Composite Design based Response Surface Modeling Methodology are used to study the effects of each design variables on the fatigue life.

Design for stackability of flash memory devices based on thermal optimization

The convergence of computing and communications dictates building up rather than out. As consumers demand more functionality in their hand-held devices, the need for more memory in a limited space is increasing, and integrating various functions into the same package is becoming more crucial. Over the past few years, die stacking has emerged as a powerful tool for satisfying these challenging integrated circuit (IC) packaging requirements. In this paper, a review of thermo-mechanical challenges for stacked die packaging is discussed.

Reliability of lead (Pb) free SAC solder interconnects with different PWB surface finishes under mechanical loading

As the Electronic Packaging industry develops technologies for fabrication of smaller, faster, economical and reliable products; thermal management and design play an important role. The major part of the failures of the electronic components is temperature related. During thermal cycling, fatigue failures are caused due to mismatch of coefficient of thermal expansion (CTE) of different materials present in the components. Increased power dissipation and density in modern electronics system require efficient and intelligent design and thermal management strategies to ensure the reliability of electronic products. This paper discusses the reliability and design optimization of a generic Printed Wiring Board (PWB) level electronic package under thermal cycle loading. Finite element tool ANSYS is used to estimate the cycles to fatigue failure of solder joint of the package coupled with optimization module present in ANSYS for providing the details on determining optimal design parameters which affect the product reliability. Combining finite element analysis with optimization would significantly reduce the design time and increases the product reliability. Four model characteristics: PWB core in-plane Youngs Modulus, PWB core in-plane coefficient of thermal expansion, PWB core thickness and the stand-off solder joint height are chosen as the optimization inputs (design variables) that ensure higher reliability and improved performance of the assembled product. The objective of the optimization is to improve the fatigue life of solder joints of the package. Sub approximation, Design of Experiment (DoE) and Central Composite Design based Response Surface Modeling Methodology are used to study the effects of each design variables on the fatigue life.

Reliability of stack packaging varying the die stacking architectures for flash memory applications

Convergence of computing and communications dictates building up rather than out. As consumers demand more functions in their hand-held devices, the need for more memory in a limited space is increasing. Over the past few years, die stacking has emerged as a powerful tool for satisfying challenging IC packaging requirements. As stacked packaging evolves into taller stacks, what issues do we face? Traditionally, chip stacking was carried out with dies of different sizes so the top die was always smaller than the bottom die to permit wire bonding of both. Today, its common to see the stacking of same-size dies or a larger die over a smaller one. One way to accommodate a larger or same-size die on top is to place a spacer (a dummy piece of silicon) between the two. Then, the spacer lifts the top die just enough to allow wire bonding to the bottom die. Another way of stacking same size die is by placing the die in different orientation. This paper focuses on the thermal analysis and optimization of stacked die area array package. Thermal analysis was done on a 3-Die stacked FBGA package using FEM tool ANSYS 9.0. Optimization was then performed on a 3-Die stacked area array package using design explorer. Then the 3-Die stacked package was extended to 7-Die stacked package using ANSYS Workbench 9.0. Three different stack configurations (staggered, rotated and spacer die) with same die size were considered for comparison purposes. Optimization was done by varying seven die powers to get the best design for stackability based on thermal performance of the package.

Strain based approach for predicting the solder joint fatigue life with the addition of intermetallic compound using finite element modeling

Tin/silver/copper (SAC) solder alloys have been introduced as primary alternatives to the eutectic tin-lead solder. SAC alloys are relatively new alloy systems in packaging applications and existing studies are limited and confined mainly to the materials, assembly process, and finite element modeling. It is essential to conduct research focusing on the material aspects of the SAC alloy coupled with its effect on reliability using both experimental methods and finite element simulations. The focus of this paper is experimental study of lead-free solder package test boards under cyclic bend load and drop impact loading. Amkor CTBGA 288 components were assembled on eight layer test boards (JESD22-B111) with Sn/Ag/Cu (95.5Sn3.8Ag0.7Cu) solder using three different PWB pad surface finishes to study the effect of the surface finish on the interconnect reliability. The pad finishes were immersion Au, immersion Ag and the organic solder preservative (OSP). The test specimens were subjected to cyclic bend fatigue and board level drop tests. Strain gage measurements were taken at numerous locations across populated and unpopulated PWBs and the data were used to create contour plots to identify variations in stress due to location and localized stiffness due to components. Results are presented with failure mode and analysis of those packages with different pad finishes and loading conditions. Finite element models were also created for the bend test boards to investigate the stress distribution and stress concentration

CFD modeling of a thermoelectric device for electronics cooling applications

Thermal analysis on various die stacking architectures, which are commonly employed in semiconductor flash products shows that thermal issues are not dominant for stack die configuration and leads to study the effect of combined thermo-mechanical and mechanical stresses. As there are existence of multiple die and other material with different CTEs, thermo-mechanical loading and its effect on reliability needs to be studied for optimum package design and die configuration

The Effect of Intermetallic Compound in Solder Joint Fatigue Life Prediction Using Finite Element Modeling

Finite element analysis is extensively used for simulating the effect of accelerated temperature cycling in electronic packages. There are number of issues that need to be addressed to improve the current FEM models. One of the limitations for the models presently available is excluding the effect of intermetallic compounds (IMC) (Cu/sub 6/Sn/sub 5/, Cu/sub 3/Sn) formation and growth between solder joint and Cu pad. The mechanical reliability of these IMC clearly influences the mechanical integrity of the interconnection. The brittle failures of solder balls have been identified with the growth of a number of IMC both at the interfaces between metallic layers and in the bulk solder balls. Previous study on intermetallics modeling discussed the energy based approach for predicting the fatigue life. The results show contradictory trends of life, not consistent with experimental data. This paper focuses the fatigue life prediction of the solder joint incorporating the effect of IMC using plastic and creep strain approach in finite element modeling. As a typical application, 3D Quarter model of a CSP is chosen to do the FE analysis. Accelerated temperature cycling is performed to obtain the plastic work due to thermal expansion mismatch between the various materials. Accumulated plastic strains were incorporated to predict the fatigue life. The model incorporates time dependent and time independent plasticity (i.e. creep) for the solder materials. The results are compared with conventional models that do not include intermetallic effects. It is shown that the strain based approach gives results that are consistent with general trends.