Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Monte Manning is active.

Publication


Featured researches published by Monte Manning.


Journal of Applied Physics | 1993

Discontinuity of B‐diffusion profiles at the interface of polycrystalline Si and single crystal Si

Shubneesh Batra; Monte Manning; Chuck Dennison; Akif Sultan; Surya Bhattacharya; K. Park; Sanjay K. Banerjee; M. Lobo; G. Lux; C. Kirschbaum; J. Norberg; T. Smith; B. Mulvaney

Boron diffusion in polycrystalline Si‐on‐single crystal Si systems has been studied by secondary ion mass spectrometry. The extrapolated B‐diffusion profiles in polycrystalline Si and in the single crystal Si substrate reveal a discontinuity at the polycrystalline Si‐single crystal Si interface. The discontinuity in the B profiles is believed to occur due to the blockage of B‐defect complexes by the interfacial oxide between polycrystalline Si and the single‐crystal Si substrate, as well as the immobility of these defect complexes in single crystal Si. The B in the implant peak region above the B solid solubility limit is found to be immobile in single crystal Si during annealing due to the formation of electrically inactive B‐defect complexes. In polycrystalline Si, however, our results show that the B in the peak region spreads out more rapidly than in single crystal Si possibly due to the diffusion of B‐defect complexes along grain boundaries. The B‐defect complexes are electrically inactive as determi...


Solid-state Electronics | 1995

A leakage current model for sub-micron lightly-doped drain-offset polysilicon TFTs

Le Tien Jung; J. Damiano; J.R. Zaman; Shubneesh Batra; Monte Manning; Sanjay K. Banerjee

Abstract Lightly-doped drain-offset polysilicon thin film transistors (LDO-TFTs) are very attractive as low leakage load elements in CMOS Static Random Access Memory (SRAM) cells. LDO-TFTs with different offset lengths and doses were fabricated and characterized. A model based on the Poole-Frenkel effect and thermionic field emission was developed to account for the leakage mechanism. The model was then applied to determine the sensitivity of the leakage current to process variations. It was found that the two most important factors influencing the leakage current are the net dose in the offset region and the distance between the channel/drain junction and the sidewall oxide.


Journal of Electronic Materials | 1993

A physically based phenomenological model using Boltzmann-Matano analysis for boron diffusion from polycrystalline Si into single crystal Si

Akif Sultan; M. Lobo; Surya Bhattacharya; Sanjay K. Banerjee; Shubneesh Batra; Monte Manning; Chuck Dennison

The diffusion of boron in single crystal Si from a BF2-implanted polycrystalline Si film deposited on single crystal Si has been accurately modeled. The effective diffusivities of boron in the single crystal Si substrate have been extracted using Boltzmann-Matano analysis and the new phenomenological model for B diffusivity has been implemented in the PEPPER simulation program. The model has been implemented for a range of furnace anneal conditions (800 to 950°C, from 30 min to 6h) and implant conditions (BF2 doses varied from 5×1015 to 2×1016 cm−2 at 70 keV).


Solid-state Electronics | 1993

Study of lateral non-uniformity as a function of junction depth in ultra-shallow junctions and its effect on leakage behavior in as-deposited polycrystalline Si and amorphous Si diodes

Shubneesh Batra; Kyle Picone; Keun Hyung Park; Suryanarayana Bhattacharya; Sanjay K. Banerjee; Jack C. Lee; Monte Manning; Chuck Dennison

Abstract Heavily implanted polycrystalline Si films are finding increasing applications as solid diffusion sources, for example, in the formation of ultra-shallow junctions in elevated source/drain metal-oxide-semiconductor field effect transistors and polycrystalline Si emitter bipolar junction transistors. For these applications the dopants are implanted into the polycrystalline Si layer and subsequently diffused into the underlying Si substrate. The diffusion behavior, is however, determined by the evolution of the polycrystalline Si grain microstructure, A large final grain size could lead to laterally more non-uniform and hence leakier junctions. These non-uniformities are lesser for high thermal budget anneals (1100–1150°C, 30 s) than for lower thermal budget anneals (950°C, 30 s) because any doping inhomogeneities in the Si substrate get smeared out as the junction becomes deeper. The junction depth, however, cannot be increased indefinitely from a device viewpoint and a trade-off between leakage current and junction depth has to be made. In this paper, we will study the effect of grain microstructure of ion-implanted as-deposited amorphous Si and as-deposited polycrystalline Si diffusion sources on the diffusion of As and B in the Si substrate, correlate it to the electrical properties of the ultra-shallow junctions formed using this technique.


Microelectronics Technology and Process Integration | 1994

Analysis and modeling of submicron drain-offset polysilicon thin film transistors (TFTs)

John Damiano; Le Tien Jung; Sanjay K. Banerjee; Shubneesh Batra; Monte Manning; Chuck Dennison

Drain-offset polysilicon thin-film transistors (DO-TFTs) with different offset lengths and doping were fabricated and characterized. The grain boundary trap states in the offset region strongly influence the electrical behavior of the TFTs. The on state current is influenced by the grain microstructure in the drain-offset region and channel region, as evidenced by the drain current activation energy measurements. The off state leakage current is dominated by the generation of carriers in the drain offset depletion region, where the trap states serve as generation/recombination centers and reduce the barrier for tunneling. A model based on the Poole-Frenkel effect and thermionic field emission was developed to account for the leakage mechanism.


Archive | 1994

Trench isolation using gated sidewalls

Monte Manning


Archive | 1996

Fully planarized thin film transistor (TFT) and process to fabricate same

Charles H. Dennison; Monte Manning


Archive | 1993

Trench isolation method having a double polysilicon gate formed on mesas

Monte Manning


Archive | 1995

Sixteen megabit static random access memory (SRAM) cell

Monte Manning


Archive | 1995

Redundancy elements using thin film transistors (TFTs)

Monte Manning

Collaboration


Dive into the Monte Manning's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Sanjay K. Banerjee

University of Texas at Austin

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

John Damiano

University of Texas at Austin

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Akif Sultan

University of Texas at Austin

View shared research outputs
Top Co-Authors

Avatar

Le Tien Jung

University of Texas at Austin

View shared research outputs
Top Co-Authors

Avatar

M. Lobo

University of Texas at Austin

View shared research outputs
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge