Mudasir Bashir

0.5 V, high gain two-stage operational amplifier with enhanced transconductance

ABSTRACT An ultra-low-power, bulk-driven (BD) two-stage operational transconductance amplifier (OTA) operating in weak inversion region with enhanced transconductance is introduced. The aim is to boost the transconductance of OTA by using multiple current shunt auxiliary differential amplifiers in positive feedback through source degeneration circuits at input stage. The OTA employs a class AB amplifier at the output stage for high DC gain, while ensuring rail-to-rail operation. The overall OTA is realised in 180 nm complementary metal-oxide semiconductor standard process and its operation is validated through worst-case post-layout simulations at 0.5-V power supply. The OTA drives a maximum bias current of 48 nA achieving an open-loop DC gain of 78 dB, 1.6 μV/√Hz input referred noise at 1 kHz, total harmonic distortion of −66.35 dB and power consumption of 35 nW. The amplifier results in a remarkable improvement in slew rate, unity gain bandwidth and offers a transconductance of at least 10 times to that of conventional BD OTAs.

A Low Power, Frequency-to-Digital Converter CMOS Based Temperature Sensor in 65 nm Process

A low power all CMOS based smart temperature sensor is introduced without using any bandgap reference or any current/voltage analog-to-digital converter. With the intention of low cost, power and area consumption, the proposed temperature sensor operates in sub-threshold region generating a temperature dependent frequency from the proportional to absolute temperature current. A digital output is obtained from the temperature dependent frequency by using a 12-bit asynchronous counter. A temperature insensitive ring oscillator is designed used a reference clock signal in counter. The temperature sensor is implemented using 65 nm CMOS standard process and its operation is validated through post-layout simulation results, at a power supply of (0.5–1)-V. The sensor has an uncalibrated accuracy of +2.4/–2.1 °C for (–55 to 125) °C and a resolution of 0.28 °C for the same range. The power and area consumed by the sensor is 1.55 µW and 0.024 mm2 respectively.

MATLAB/SIMULINK based time-domain behavioral modeling of multibit sigma-delta converters

The paper presents an approach for design of sigma-delta (ΣΔ) converters. This technique helps in finding the appropriate architecture and topology of ΣΔ modulator along with block level specifications. The design approach is implemented on the MATLAB/SIMULINK platform, that involves statistical and simulation based optimization techniques at different block levels. A 16-bit, 250 KHz signal bandwidth discrete-time switched capacitor ΣΔ converter is implemented using this technique. The behavioral model developed resulted in an ENOB of 15.58 bits, SNR of 105.9dB and third order distortion of -117.563dB. The technique besides saving time, provides more resilience in the design and simulations of ΣΔ modulators.

A low power, high accuracy amperometric potentiostat for NO x gas sensors

A low power, 1-V and an area efficient CMOS amperometric potentiostat is designed for gas sensors exploiting the benefits of room temperature ionic liquids. A regulated cascode current mirror is used as current replicating interface, which results in better performance in terms of gain, input/output resistance, bandwidth and linearity. The potentiostat is implemented in 65 nm CMOS standard process, resulting in detection of redox current of 0.2 nA–12.3 μA and having a power consumption of 11.5 μW, while having an area of 0.018 mm2.

On-chip CMOS temperature sensor with current calibrated accuracy of −1.1°C to +1.4°C (3σ) from −20°C to 150°C

This paper proposes a new sensor circuit to monitor on-chip frequency temperature changes in VLSI circuits. The proposed circuit exploits the temperature dependency of current/voltage of metal-oxide-semiconductor field effect transistor. The variation of current/voltage in the temperature sensor circuit with respect to temperature is subjected to a ring oscillator which provides the relative frequency translation. The circuit is implemented in 0.18μm CMOS technology for a temperature range of -20°C to +150 °C, operates with two point calibration, having an uncertainty of -1.1°C to +1.4°C, consumes a low energy of 0.31nJ per sample and a power consumption of 0.093μW at 12MHz frequency. A switch is used at reference clock frequency to perform self-calibration, hence removing the effects of mismatch and process variation.

High speed self biased current sense amplifier for low power CMOS SRAM's

Sense amplifiers are one of the important circuits in the CMOS memories as they have a greater impact on the access time and power dissipation of memory cells. The current-mode sense amplifiers have improved the access time as well as power dissipation to a large extent when compared to voltage-mode sense amplifiers, thus resulting in making the memories compatible with the high speed CMOS technologies. In this paper, a new topology of current-mode sense amplifiers is introduced which overcomes the imperfections associated with the conveyer based current-mode sense amplifiers. The circuit has resulted in a low sense delay of 596.6 psecs and power dissipation of 0.87uW and in the end the effect of bit-line capacitances on sense delay, power supply and temperature on power dissipation is calculated.