Murali R. Varanasi

Cooperative Network Coding for Wireless Ad-Hoc Networks

In wireless ad-hoc networks, a major challenge is how to provide robust and efficient communication. To achieve this goal, cooperative communication and network coding have been proven to be effective. In the literature, most existing studies focus on the performance of the two schemes separately. In our study, we will investigate the performance of system that combines them tightly together. In particular, we will propose a unified two-way traffic model that can characterize the features of both of them. Based on this model, we develop a new cooperative network coding scheme to further improve the system throughput. Both decode-and-forward and amplify-and-forward techniques are discussed for the two-way traffic model. Numerical results show that the new scheme can significantly improve the performance over traditional schemes.

Design of Sensor-Embedded Radio Frequency Identification (SE-RFID) Systems

Sensor-embedded radio frequency identification (SE-RFID) is introduced to enhance the sensing functions of the current RFID systems. Two innovative architectures for SE-RFID systems are proposed and analyzed; the preliminary simulation of the proposed SE-RFID systems based on EDA software has been conducted successfully. An effort to design, simulate and develop a real-time health monitoring system (HEMS) based on SE-RFID is now under way

A high-performance VLSI architecture for advanced encryption standard (AES) algorithm

In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round of the Rijndael algorithm, are generated in real-time by the key-scheduler module by expanding the initial secret key, thus reducing the amount of storage for buffering. Moreover, pipelining is used after each standard round to enhance the throughput. A prototype chip implemented using 0.35 /spl mu/ CMOS technology resulted in a throughput of 232Mbps for iterative architecture and 1.83Gbps for pipelining architecture.

Comparative study of RSS-based collaborative localization methods in sensor networks

Reliable localization is an essential building block of sensor networks. Many techniques have taken advantage of the received signal strength (RSS) measurement for location estimation in wireless sensor networks, since no special hardware implementation is required to measure RSS in almost all kinds of wireless systems. In this paper, two such techniques, MDS method and MLE that are recently proposed for collaborative location estimation, are studied in detail. From the theoretical formulation of the RSS-based location estimation problem, it is seen that MLE is more appropriate than MDS method. However, from simulation studies of both algorithms, which are iterative in nature, it is found that MLE is more sensitive to initial estimate than MDS method. Therefore, in this paper we propose to integrate these two techniques in series so that an estimate is first obtained using MDS method by taking advantage of its better convergence property, then MLE is employed to fine-tune the solution of MDS method to remove modeling errors that are inherent in MDS method. Through extensive simulations it is demonstrated that the new integrated method, named MDS-MLE, consistently outperforms both MDS method and MLE in various simulation scenarios. In this paper, we also address many important issues in collaborative localization, including effects of sensor node density, reference node density, and different deployment strategies of reference nodes.

Unidirectional byte error detecting codes for computer memory systems

Codes are developed for detecting unidirectional errors in t bytes simultaneously (t-UBED) while also providing all unidirectional error detection (AUED). These classes of codes differ from purely all unidirectional error detecting codes in that the errors in one byte may be of the form 1 to 0, while in another byte they may be of the form 0 to 1. The codes utilize 2 B for parity check information. As an example, a code providing 3-UBED+AUED protection for up to 12 information bytes of 8 b each can be constructed. >

Joint scheme for physical layer error correction and security

We present a joint scheme that combines both error correction and security at the physical layer. In conventional communication systems, error correction is carried out at the physical layer while data security is performed at an upper layer. As a result, these steps are done as separate steps. However there has been a lot of interest in providing security at the physical layer. As a result, as opposed to the conventional system, we present a scheme that combines error correction and data security as one unit so that both encryption and encoding could be carried out at the physical layer. Hence, in this paper, we present an Error Correction-Based Cipher (ECBC) that combines error correction and encryption/decryption in a single step. Encrypting and encoding or decoding and decrypting in a single step will lead to a faster and more efficient implementation. One of the challenges of using previous joint schemes in a communications channel is that there is a tradeoff between data reliability and security. However, in ECBC, there is no tradeoff between reliability and security. Errors introduced at the transmitter for randomization are removed at the receiver. Hence ECBC can utilize its full capacity to correct channel errors.We show the result of randomization test on ECBC and its security against conventional attacks. We also present the nonpipelined and pipelined hardware architecture of ECBC, and the result of the FPGA implementation of the ECBC encryption.We also compare these results with non-ECBC schemes.

VLSI architecture and FPGA prototyping of a digital camera for image security and authentication

Two fundamental operations performed by a digital camera are image capturing and storing. The images are subsequently transmitted in various forms over appropriate media. These images are always vulnerable to various forms of copyright attacks and ownership issues. This paper introduces a digital camera with built-in copyright protection and security mechanism for images produced by it. Since the proposal of the trustworthy digital camera by Friedman [1], significant research has been done in developing algorithms for watermarking and encryption with the aim of using them in digital cameras. However, only few of these efforts are involved with the architectural development of the entire digital camera. Incorporation of encryption and watermarking together in the digital camera will assist in protecting and authenticating image files. In this paper, we present an architecture and a hardware efficient FPGA based watermark module towards the development of the complete digital camera.

Unidirectional 9-bit byte error detecting codes for computer memory systems

Codes are developed for detecting unidirectional errors in t bytes simultaneously (t-UBED). Some of the codes constructed also provide all unidirectional error detection (AUED). These classes of codes are different from AUED codes in that the errors in one byte may be of the form 1 to 0 while in another byte they may be of the form 0 to 1. The codes developed are for bytes of length nine consisting of eight data bits and one parity bit and utilize one byte for parity check information in addition to the parity check bits. Under various assumptions, codes varying in protection from 2-UBED to 4-UBED and 2-UBED+AUED to 3-UBED+AUED are constructed.<<ETX>>

Physical Layer Error Correction Based Cipher

In conventional communication systems, error correction is carried out at the physical layer while data security is performed performed at an upper layer. As a result, these steps are done as separate steps. As opposed to this conventional system, we present a scheme that combines error correction and data security as one unit so that both encryption and encoding could be carried out at the physical layer. Hence, in this paper, we present an Error Correction Based Cipher (ECBC) that combines error correction and encryption/decryption in a single step. Encrypting and encoding or decoding and decrypting in a single step will lead to a faster and more efficient implementation. One of the challenges of using previous joint schemes in a communications channel is that there is a tradeoff between data reliability and security. However in ECBC, there is no trade off between reliability and security. Errors introduced at the transmitter for randomization are removed at the receiver. Hence ECBC can utilize its full capacity to correct channel errors. We show the result of randomization test on ECBC and its security against conventional attacks. We also present the result of the FPGA implementation of the ECBC encryption.

A Lego Mindstorms NXT-Based Test Bench for Cohesive Distributed Multi-agent Exploratory Systems: Mobility and Coordination

A cost-effective and time-saving test bench can significantly help with the study and implementation of distributed multi-agent exploratory systems. In this paper, we introduce a computer-based test bench that controls multiple low-cost Lego Mindstorms NXT programmable robotics kits via Bluetooth. We identify mobility and coordination as the two critical components to establish a platform for exploratory systems, and describe in detail how they are implemented using the low-cost Lego Mindstorms robots. In particular, the test bench includes a variety of ground-based or airborne mobility models, such as the Random Direction, Random Way-point, Flight Plan-based, and Smooth-turn mobility models. It also includes a distributed task assignment algorithm, based upon the stochastic automaton known as the influence model. At the end of the paper, we present a search-and-rescue example to illustrate the use of the test-bench. We expect that the test bench can serve as a conduit to foster the real-world application of distributed multi-agent exploratory system concepts.