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Dive into the research topics where Elias Kougianos is active.

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Featured researches published by Elias Kougianos.


IEEE Potentials | 2006

Biosensors: a tutorial review

Saraju P. Mohanty; Elias Kougianos

This paper discusses various biosensors in detail, where the biosensor consists of bioelement and a sensor element. The bioelement may be an enzyme, antibody, living cells etc., and the sensing element may be electric current, electric potential, and so on. This survey initially introduces the basic concept of the biosensors. High-level overviews of different types of biosensors are given and the working principles, constructions, advantages and applications of many biosensors are also presented. In addition to these MEMS have given rise to a whole new class of biosensors which involve the transduction of mechanical energy and are based on mechanical phenomena.


Computers & Electrical Engineering | 2009

Hardware assisted watermarking for multimedia

Elias Kougianos; Saraju P. Mohanty; Rabi N. Mahapatra

Digital media offer several distinct advantages over analog media, such as high quality, ease of editing, and ease of processing operations such as compression and high fidelity copying. Digital data is commonly available through digital TV broadcast, CD, DVD, and computing devices such as personal computers. The ease by which a digital media object can be duplicated and distributed has led to the need for effective digital rights management tools. Digital watermarking is one such tool. Watermarking is the process of embedding extra data called a watermark into a multimedia object, like image, audio, or video, such that the watermark can later be detected or extracted in order to make an assertion regarding the object. During the last decade, numerous software based watermarking schemes have appeared in the literature and watermarking research has attained a certain degree of maturity. But hardware based watermarking systems have evolved more recently only and they are still at their infancy. The goal of hardware assisted watermarking is to achieve low power usage, real-time performance, reliability, and ease of integration with existing consumer electronic devices. In this paper, we survey the hardware assisted solutions proposed in the literature for watermarking of multimedia objects. The survey is preceded by an introduction to the background issues involved in digital watermarking.


Iet Computers and Digital Techniques | 2007

VLSI architecture and chip for combined invisible robust and fragile watermarking

Saraju P. Mohanty; Elias Kougianos; Nagarajan Ranganathan

Research in digital watermarking is mature. Several software implementations of watermarking algorithms are described in the literature, but few attempts have been made to describe hardware implementations. The ultimate objective of the research is to develop low-power, high- performance, real-time, reliable and secure watermarking systems, which can be achieved through hardware implementations. The development of a very-large-scale integration architecture for a high-performance watermarking chip is presented which can perform both invisible robust and invisible fragile image watermarking in the spatial domain. The watermarking architecture is prototyped in two ways: (i) by using a Xilinx field-programmable gate array and (ii) by building a custom integrated circuit. This prototype is the first watermarking chip with both invisible robust and invisible fragile watermarking capabilities.


international conference on mechatronics and automation | 2006

Design of Sensor-Embedded Radio Frequency Identification (SE-RFID) Systems

Hai Deng; Murali R. Varanasi; Kathleen M. Swigger; Oscar N. Garcia; Ron Ogan; Elias Kougianos

Sensor-embedded radio frequency identification (SE-RFID) is introduced to enhance the sensing functions of the current RFID systems. Two innovative architectures for SE-RFID systems are proposed and analyzed; the preliminary simulation of the proposed SE-RFID systems based on EDA software has been conducted successfully. An effort to design, simulate and develop a real-time health monitoring system (HEMS) based on SE-RFID is now under way


international symposium on multimedia | 2006

A Novel Invisible Color Image Watermarking Scheme Using Image Adaptive Watermark Creation and Robust Insertion-Extraction

Saraju P. Mohanty; Parthasarathy Guturu; Elias Kougianos; Nishikanta Pati

In this paper we present a robust and novel strategic invisible approach for insertion-extraction of a digital watermark, a color image, into color images. The novelty of our scheme lies in determining a perceptually important sub-image in the host image so that slight tampering of the sub-image will affect the aesthetic of the host image significantly. This eliminates the possibility of watermark removal, which in turn makes the watermark secure and robust. The other novel feature of our algorithm is the creation of a compound watermark image, called effective watermark, using the input user watermark (logo) and attributes of host image, which facilitates robust insertion-extraction processes. The effective watermark creation consists of two distinct phases: in the first phase, a statistical image is synthesized from a perceptually important sub-image of the host image and in the second phase, a compound image is created by fusing the input logo and synthetic statistical image. Results of exhaustive experimentation using standard benchmarks demonstrates the robustness and efficacy of our approach


Journal of Systems and Software | 2011

Real-time perceptual watermarking architectures for video broadcasting

Saraju P. Mohanty; Elias Kougianos

Existing secure embedded systems are primarily cryptography based. However, for effective Digital Rights Management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. In this paper, a watermarking algorithm and corresponding VLSI architectures are presented that will insert a broadcasters logo into video streams in real-time to facilitate copyrighted video broadcasting and Internet protocol television (IP-TV). The VLSI architecture is prototyped using a hardware description language (HDL) and when realized in silicon can be deployed in any multimedia producing consumer electronics equipment to enable real-time DRM right at the source. The watermark is inserted into the video stream before MPEG-4 compression, resulting in simplified hardware requirements and superior video quality. The watermarking processing is performed in the frequency (DCT) domain. The system is initially simulated and validated in MATLAB/Simulink^(R) and subsequently prototyped on an Altera^(R) Cyclone-II FPGA using VHDL. Its maximum throughput is 43frames/s at a clock speed of 100MHz which makes it suitable for emerging real-time digital video broadcasting applications such as IP-TV. The watermarked video is of high quality, with an average Peak-Signal-to-Noise Ratio (PSNR) of 21.8dB and an average Root-Mean-Square Error (RMSE) of 20.6.


IEEE Transactions on Semiconductor Manufacturing | 2012

A Comparative Study of Metamodels for Fast and Accurate Simulation of Nano-CMOS Circuits

Oleg Garitselov; Saraju P. Mohanty; Elias Kougianos

Fast simulation is a bottleneck for design space exploration of complex nanoscale CMOS (nano-CMOS) analog and mixed-signal (AMS) circuits. This paper presents the use of “metamodels” for fast and accurate AMS circuit design exploration. A design process flow that uses metamodels is introduced. Metamodel generation is the most time-consuming step of the design flow. Consequently, accurate and fast sampling of the design space is essential for the creation of the metamodel. Different sampling techniques are investigated to minimize the number of samples required. This paper uses two nanoscale CMOS analog circuits: a 45-nm ring oscillator and a 180-nm LC-VCO, as case studies. It is observed that the parasitics generated from the physical design of the circuits have a drastic effect on their performance metrics, such as frequency. Four alternative sampling techniques, both random [Monte Carlo (MC)] and uniform [Latin hypercube sampling (LHS), middle Latin hypercube sampling (MLHS), and design of experiments (DOEs)], are considered and compared for speed and accuracy. This paper provides a thorough exploration of these sampling techniques to determine which one is more suitable to minimize sampling size for metamodel generation and optimize the design cycle. Experiments show that LHS sampling is best for both circuits, followed by MLHS, MC, and DOE. In this paper, it is also shown that polynomial metamodels of order higher than two (which are commonly used) provide best accuracy.


international conference on vlsi design | 2006

Modeling and reduction of gate leakage during behavioral synthesis of nanoCMOS circuits

Saraju P. Mohanty; Elias Kougianos

For a nanoCMOS of sub-65mn technology, where the gate oxide (SiO/sub 2/) thickness is very low, the gate leakage is one of the major components of power dissipation. In this paper, we provide analytical models to describe the tunneling current and propagation delay of behavioral level components considering various physical effects in the absence of foundry data. Subsequently, we explore the use of multiple oxide thickness resources as a technique for the reduction of gate leakage. In particular, we introduce a behavioral datapath scheduler that maximizes the utilization of higher gate oxide thickness resources. We characterize behavioral components for both 65nm and 45nm technologies in order to study the trend of tunneling current as technology scales, and provide them as inputs to the scheduler. We carried out extensive experiments for several benchmarks and observed significant reduction in gate leakage.


IEEE Access | 2016

Design of a High-Performance System for Secure Image Communication in the Internet of Things

Elias Kougianos; Saraju P. Mohanty; Gavin Coelho; Umar Albalawi; Prabha Sundaravadivel

Image or video exchange over the Internet of Things (IoT) is a requirement in diverse applications, including smart health care, smart structures, and smart transportations. This paper presents a modular and extensible quadrotor architecture and its specific prototyping for automatic tracking applications. The architecture is extensible and based on off-the-shelf components for easy system prototyping. A target tracking and acquisition application is presented in detail to demonstrate the power and flexibility of the proposed design. Complete design details of the platform are also presented. The designed module implements the basic proportional-integral-derivative control and a custom target acquisition algorithm. Details of the sliding-window-based algorithm are also presented. This algorithm performs


international conference on consumer electronics | 2007

A Watermarking Co-Processor for New Generation Graphics Processing Units

Saraju P. Mohanty; Nishikanta Pati; Elias Kougianos

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Dhruva Ghai

University of North Texas

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Oleg Garitselov

University of North Texas

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Geng Zheng

University of North Texas

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Umar Albalawi

University of North Texas

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