Myoungbo Kwak

Wideband Envelope Tracking Power Amplifiers With Reduced Bandwidth Power Supply Waveforms and Adaptive Digital Predistortion Techniques

This paper presents a new technique to reduce the bandwidth of the dynamic power supply waveform used in wideband envelope tracking power amplifiers (PAs). When the envelope tracking technique is applied to broadband signals such as WCDMA and 3GPP LTE, the wide bandwidth of the envelope signal makes it difficult to implement the dynamic supply modulator efficiently and accurately. We show here a technique to reduce the bandwidth of the power supply waveform, thereby allowing better efficiency for the supply modulator; and a linearization method for correcting the nonlinearity caused by the bandwidth reduction. The feasibility of this technique is demonstrated for a single carrier WCDMA signal with a 7.6-dB peak-to-average power ratio using a GaAs high-voltage HBT PA. The bandwidth of the power supply waveform is reduced from 20 to 4 MHz. After linearization, the reduced bandwidth envelope tracking PA exhibits an average output power of 28 W, an average gain of 12 dB and an overall power-added efficiency of 49%. The measured normalized rms error is as low as 0.67% with an adjacent channel leakage ratio of -53.9 and -54.2 dBc at offset frequencies of 5 and 10 MHz, respectively.

Modeling and Design of RF Amplifiers for Envelope Tracking WCDMA Base-Station Applications

Wideband code division multiple access (WCDMA) base-station RF amplifiers using a variety of device technologies including GaN field-effect transistors (FETs), Si LDMOS, and GaAs high-voltage heterojunction bipolar transistors (HVHBTs) are modeled, optimized, and compared for use in wideband envelope tracking (ET) system. A quasi-static approach is employed to effectively model the supply-modulated RF amplifiers, and thus facilitate the design optimization process. A new design methodology for ET RF amplifiers is introduced including identification of optimum fundamental and harmonic terminations. The fundamental and harmonic impedances have been successfully optimized for various RF devices and good agreement has been achieved between the simulation and measurement results. Among the modeled and measured ET RF amplifiers, a GaAs HVHBT exhibits the best overall efficiency of 60% with an average output power of 33 W and a gain of 10 dB for a WCDMA signal with 3.84-MHz bandwidth and 7.7-dB peak-to-average power ratio, while meeting all linearity requirements of the WCDMA standard. Desirable device characteristics for optimum ET operation are also discussed.

Wideband envelope tracking power amplifier with reduced bandwidth power supply waveform

This paper presents a new technique to reduce the bandwidth of the dynamic power supply waveform for use in wideband envelope tracking power amplifiers (PAs). When the envelope tracking technique is applied to the broadband signals such as WiMAX and LTE, the wide bandwidth of the envelope signal makes it difficult to implement the dynamic power supply efficiently and accurately. We show here for the first time a technique to reduce the bandwidth of the dynamic power supply voltage, thereby allowing better efficiency for the dynamic power supply; and a linearization method for correcting the nonlinearity caused by the bandwidth reduction. The feasibility of this technique is demonstrated for a single carrier WCDMA signal with 7.8-dB PAPR using a GaAs HVHBT PA. The bandwidth of the power supply signal is reduced from 20 MHz to 5 MHz. After linearization, the reduced bandwidth envelope tracking PA exhibits an average output power of 25 W, an average gain of 13 dB and an overall power-added efficiency of 50%. The measured normalized RMS error is as low as 3.98% with an adjacent channel leakage ratio of −41 dBc and −48 dBc at offset frequencies of 5 MHz and 10 MHz, respectively.

High Efficiency WCDMA Envelope Tracking Base-Station Amplifier Implemented with GaAs HVHBTs

A record high-performance GaAs high-voltage HBT (HVHBT)-based WCDMA base-station power amplifier is presented, which uses an envelope tracking bias system to achieve high efficiency and linearity. A wideband envelope amplifier provides dynamic collector supply biasing to the RF stage. A digital pre-distortion technique is employed to satisfy the linearity specifications of WCDMA. The measured overall power-added efficiency reached 58% with a normalized root-mean-square (RMS) error of 2.9% and an adjacent channel leakage ratio (ACLR) of -49 dBc at 5-MHz offset at an average output power of 42 W and a gain of 10.3 dB for a single carrier WCDMA signal with 6.6-dB peak-to-average power ratio. A memory mitigation algorithm further improves the linearity, resulting in an ACLR of -70 dBc and a normalized RMS error of 0.3%. Measurements were made to quantify separately the efficiency contributions of the HVHBT-based RF stage, and of the envelope amplifier. The measurements show that the RF stage operates at collector efficiency above 85% over most of the instantaneous power range of the WCDMA signal. This remarkably high efficiency is the result of low ldquoon-resistancerdquo and low (and nearly voltage independent) output capacitance of the HVHBT.

High efficiency envelope tracking power amplifier with very low quiescent power for 20 MHz LTE

A high efficiency wideband envelope tracking power amplifier with low quiescent power is presented. The CMOS envelope amplifier has a combined linear amplifier and switching amplifier to achieve high efficiency and wider bandwidth. Quiescent power of the envelope amplifier is reduced using a source cross-coupled linear amplifier with inherently low DC power dissipation. Measurements show a power added efficiency of 45% for the envelope tracking power amplifier for 20 MHz LTE signal with 6.0 dB PAPR at 2.5 GHz at 1W output power.

Design of a Wideband High-Voltage High-Efficiency BiCMOS Envelope Amplifier for Micro-Base-Station RF Power Amplifiers

A high-performance bipolar-CMOS-DMOS (BCD) monolithic envelope amplifier for micro-base-station power amplifiers (PAs) is presented. Measurement of the BCD high-voltage (VDD = 15 V) envelope amplifier shows an efficiency of 72% using 7.7-dB peak-to-average ratio WCDMA input signals at an average envelope amplifier output power above 3 W. A WCDMA envelope-tracking RF PA at 2.14 GHz, including a GaN field-effect transistor RF stage, has an overall drain efficiency above 51%, with a normalized power root-mean-square error below 1.2% and an adjacent channel leakage ratio of -49 dBc at 5-MHz offset using memory-effect mitigation digital pre-distortion, at an average output power above 2 W and a gain of 10 dB.

A Low-Jitter Added SSCG with Seamless Phase Selection and Fast AFC for 3rd Generation Serial-ATA

A low-jitter added 3GHz spread-spectrum clock generator (SSCG) with seamless phase selection and a fast automatic frequency calibration (AFC) was implemented in 90nm CMOS process. The proposed SSCG takes full advantage of multi-phase switching with increased sigma-delta operation speed. Large frequency shift and low jitter addition is obtained without extra phase management logic. A new AFC is also proposed for multi-band LC-VCO used in the SSCG. A fast and high resolution frequency calibration is done with direct counting of high frequency VCO clock. The experimental result shows that only 2.7ps peak-to-peak jitter is added by spread-spectrum clocking (SSC) and 400ns of unit frequency comparison time is achieved in AFC process

Envelope tracking power amplifiers with reduced peak-to-average power ratio RF input signals

This paper presents a new technique to reduce the peak-to-average power ratio (PAPR) of the RF input signals used in envelope tracking (ET) power amplifiers without degrading the linearity and efficiency performance of the RF stages. Due to heavy gain compression, ET amplifiers can suffer from inefficient driver stages. The reduced PAPR RF input signal improves the efficiency of the driver amplifier thereby potentially improving the overall efficiency of the ET amplifier. This technique is demonstrated for a single carrier WCDMA signal using a dynamic supply modulator and a RF stage based on a GaAs HVHBT. The measurement shows that a power added efficiency (PAE) of 74% can be maintained for the RF stage while the PAPR of the RF input signal is reduced from 7.6 dB to 5.2 dB. The overall PAE accounting for the supply modulator is greater than 50% with an average output power of greater than 26 W and an adjacent channel leakage ratio of less than −45 and −53 dBc at 5- and 10-MHz frequency offsets, respectively.

High efficiency wideband envelope tracking power amplifier with direct current sensing for LTE applications

A high efficiency wideband envelope tracking power amplifier for LTE applications is presented. The CMOS envelope amplifier with direct current sensing has a measured average efficiency of 78% with a 5 MHz LTE signal. The envelope tracking power amplifier including a GaAs HBT RF stage has overall power added efficiency (PAE) above 46% with an average LTE output power of 27.6 dBm and a gain of 26.5 dB.

Wideband high efficiency envelope tracking integrated circuit for micro-base station power amplifiers

This paper presents a high performance BCD (Bipolar-CMOS-DMOS) monolithic envelope tracking IC to achieve high efficiency and linearity for micro-base station power amplifier applications. Measurement of the BCD high voltage (Vdd = 15 V) envelope amplifier shows an efficiency of 72% using WCDMA input signals (7.7 dB PAR). An envelope tracking power amplifier including a GaN FET RF stage has overall drain efficiency (DE) above 51%, with a normalized power RMS error below 1.2% and ACLR1 of −49 dBc using memory mitigation digital pre-distortion (DPD), at an average WCDMA output power above 2 W and a gain of 10 dB.