MyungGil Kang

Electrical Characteristics of the Backgated Bottom-Up Silicon Nanowire FETs

We report the electrical characteristics of backgated silicon nanowire (SiNW) FETs at temperatures ranging from 300 to 160 K. The voltage drop along the intrinsic part of the silicon nanowire (SiNW) was obtained by modeling the source/drain contacts as Schottky diodes. The field effect mobility values obtained from the extracted intrinsic voltage drop showed activation behaviors in the given temperature range. The activation energy was smaller than that of previously reported Ge nanowires.

Ensemble of electrophoretically captured gold nanoparticles as a fingerprint of Boltzmann velocity distribution

An ensemble of electrophoretically captured gold nanoparticles is exploited to fingerprint their velocity distribution in solution. The electrophoretic capture is performed using a dc biased nanogap electrode, and panoramic scanning electron microscopic images are inspected to obtain the regional density of the captured gold nanoparticles. The regional density profile along the surface of the electrode is in a quantitative agreement with the calculated density of the captured nanoparticles. The calculated density is obtained by counting, in the Boltzmann distribution, the number of nanoparticles whose thermal velocity is smaller than the electrophoretic velocity.

Aluminum Nanotransmission Lines with No Grain Boundaries and No Surface Roughness

Ideal metallic interconnects and transmission lines should be free of grain boundaries and surface roughness. In this study, we demonstrated microwave transmission through transmission lines fabricated from single-crystalline aluminum nanowires (AlNWs) with no surface roughness and no grain boundaries. These nanotransmission lines showed an intrinsic loss of 3 dB at the frequency of 140 GHz. The extracted parameters from the measured microwave data exhibited resistance values consistent with the ideal DC resistivity of pure aluminum.

Electrical characteristics of the back-gated bottom-up silicon nanowire field effect transistor

We report electrical characteristics of back-gated silicon nanowire field effect transistors (SNWFETs) fabricated using silicon nanowires synthesized by a standard vapor-liquid-solid process. It is shown that the mobilities obtained from the measured transconductances are reasonable only when the nanowire is fully depleted.

Fabrication of poly-silicon nano-wire transistors on plastic substrates.

We report the fabrication and characterization of poly-Si nanowire transistors on flexible substrates. The nanowire transistors are fabricated on a SiO2/Si substrate using conventional CMOS processes, and then they are transferred onto polyimide substrates. The transfer process is performed by spin-coating of polyimide, curing (annealing) of the polyimide layer, and removal of the SiO2 sacrificial layer. The optimized curing condition results in the maximum bending of 150 degrees with full recovery. The nanowire transistors exhibit transistor characteristics as a function of the backgate bias. Our new process can be applied to the fabrication of Si-nanowire transistors with larger mobilities.

Measurement of femto-farad gate capacitance of a silicon nanowire FET using time-domain pulse response

We present the direct measurement of the gate capacitance of a silicon nanowire field effect transistor using time-domain monitoring of the source current when the gate pulses with various frequencies and amplitudes are applied. The displacement current induced at the gate capacitance is proportional to the derivative of the gate pulse, and it becomes measurable when the rise time of the gate pulse is small enough. The gate capacitance of fF range was successfully measured using our method.

RF characterization of a single wall carbon nanotube bundle

Summary form given only. As carbon nanotubes (CNTs) are becoming the most promising material for nanoelectronic devices, interests on their high-frequency properties are being further increased. Recently, many active researches characterizing single-wall or multi-wall CNTs have been reported. Here, we fabricate the device with a bundle of single-wall CNT (SWCNT) captured between two signal electrodes of a coplanar waveguide (CPW), and report its radio-frequency (RF) characterization and equivalent circuit modeling. The article shows an SEM image of the SWCNT bundle captured between two signal electrodes of the CPW with the gap of 700 nm. First of all, the CPW for GSG measurement was fabricated on the high resistivity Si wafer by photolithography and lift-off process. Further electron beam lithography made the CPW has sharp signal electrodes to alleviate the drastic impedance mismatching with the SWCNT and to minimize the parasitic capacitance between two signal electrodes. The bundle of SWCNTs was captured between two signal electrodes of the CPW by dielectrophoresis alignment. Then, we made the ohmic contact between the SWCNT and the CPW by using Au electroplating and subsequent thermal annealing. This electroplating process does not require one more step of lithography. The article shows the measured transmission (S21) and reflection (S11) characteristics of the CPWs with/without SWCNT at frequencies of 0.1 ~ 40 GHz. The transmission of the CPW with SWCNT is 1 dB larger than that of the CPW without SWCNT at 10 GHz. The difference denotes the amount of the transmission through SWCNT, and it is added to the transmission through the parasitic capacitance between two signal electrodes of the open CPW. The reflection of the CPW with SWCNT is maximum 1.7 dB smaller than that of the CPW without SWCNT at 38 GHz. Figure 3 shows the equivalent circuit model of the CPW combined with SWCNT. The parasitic parameter values of the open CPW were extracted from the measurement data of the CPW without SWCNT by ADS optimization. The parasitic values are follows; L1 = 0.006 nH, L2 = 0.005 nH, R1, = 8 Omega, R2 = 10.7 Omega, C1 = 0.04 pF, C2 = 0.05 pF, and C3 = 0.07 fF. Then, we extracted the other parameter values (due to SWCNT) from the measurement data of the CPW with SWCNT, keeping the parasitic values of the open CPW. The values are follows; Rc = 4.1 kOmega, Cel = 0.9 fF, RCNT = 1.04 kOmega, and Lk = 1.2 nH. We completed the total equivalent circuit model of the CPW with SWCNT by using ADS optimization since the de-embedding of CPW pads may result in overestimation due to contact resistance. The article shows the magnitude and phase of the impedance (Z) obtained from the measurement and from the equivalent circuit of the CPW with SWCNT. The measured data are consistent with the modeled data within a reasonable accuracy. In summary, we have captured SWCNT between two signal electrodes of the CPW and presented its high-frequency characterization. From the de-embedding process using the equivalent circuit, we successfully obtain the resistance (RCNT = 1 -04 kOmega) and the inductance (Lk = 1.2 nH) of the SWCNT bundle.