Myungjoon Choi

IoT design space challenges: Circuits and systems

The Internet of Things (IoT) is a rapidly emerging application space, poised to become the largest electronics market for the semiconductor industry. IoT devices are focused on sensing and actuating of our physical environment and have a nearly unlimited breadth of uses. In this paper, we explore the IoT application space and then identify two common challenges that exist across this space: ultra-low power operation and system design using modular, composable components. We survey recent low power techniques and discuss a low power bus that enables modular design. Finally, we conclude with three example ultra-low power, millimeter-scale IoT systems.

21.5 A current-mode wireless power receiver with optimal resonant cycle tracking for implantable systems

Continuous health monitoring has become feasible, largely due to miniature implantable sensor systems such as [1]. To recharge batteries of such systems, wireless power transfer is a popular option since it is non-invasive. However, there are two main challenges: 1) strict safety regulations of incident power on human tissue; 2) small coil size for better biocompatibility. These issues reduce the received power at the coil, make it difficult to obtain sufficient power for implanted devices, and call for high power-efficiency (ηP)-transfer techniques, especially at very low received power levels.

A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs

This work presents a sub-μW on-chip oscillator for fully integrated system-on-chip designs. The proposed oscillator introduces a resistive frequency locked loop topology for accurate clock generation. In this topology, a switched-capacitor circuit is controlled by an internal voltage-controlled oscillator (VCO), and the equivalent resistance of this switched-capacitor is matched to a temperature-compensated on-chip resistor using an ultra-low power amplifier. This design yields a temperature-compensated frequency from the internal VCO. The approach eliminates the traditional comparator from the oscillation loop; this comparator typically consumes a significant portion of the total oscillator power and limits temperature stability in conventional RC relaxation oscillators due to its temperature-dependent delay. A test chip is fabricated in 0.18 μm CMOS that exhibits a temperature coefficient of 34.3 ppm/°C with long-term stability of less than 7 ppm (12 second integration time) while consuming 110 nW at 70.4 kHz. A radio transmitter circuit that uses the proposed oscillator as a baseband timing source is also presented to demonstrate a system-on-chip design using this oscillator.

A 23pW, 780ppm/°C resistor-less current reference using subthreshold MOSFETs

This paper proposes a MOSFET-only, 20pA, 780ppm/°C current reference that consumes 23pW. The ultra-low power circuit exploits subthreshold-biased MOSFETs and a complementary-to-absolute temperature (CTAT) gate voltage to compensate for temperature dependency. The design shows low supply voltage sensitivity of 0.58%/V and a load sensitivity of 0.25%/V.

5.8 A 4.7nW 13.8ppm/°C self-biased wakeup timer using a switched-resistor scheme

Miniaturized computing platforms typically operate under restricted battery capacity due to their size [1]. Due to low duty cycles in many sensing applications, sleep-mode power can dominate the total energy budget. Wakeup timers are a key always-on component in such sleep modes and must therefore be designed with aggressive power consumption targets (e.g., <;10nW). Also, accurate timing generation is critical for peer-to-peer communication between sensor platforms [1]. Although a 32kHz crystal oscillator can provide low power [2] and accurate long-term stability, the requirement of an off-chip component complicates system integration for small wireless sensor nodes (WSNs).

A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability

We present a low power on-chip oscillator for system-on-chip designs. The oscillator introduces a resistive frequency locking loop topology where the equivalent resistance of a switched-capacitor is matched to a temperature-compensated resistor. The approach eliminates the traditional comparator from the oscillation loop, which consumes significant power and limits temperature stability in conventional relaxation oscillators. The oscillator is fabricated in 0.18μm CMOS and exhibits 27.4ppm/oC and <;7ppm long-term stability while consuming 99.4nW at 70.4 kHz.

8.5 A 60%-efficiency 20nW-500µW tri-output fully integrated power management unit with environmental adaptation and load-proportional biasing for IoT systems

As Internet-of-Things (IoT) systems proliferate, there is a greater demand for small and efficient power management units. Fully integrated switched-capacitor (SC) DC-DC converters are promising candidates due to their small form factor and low quiescent power, aided by dynamic activity scaling [1-3]. However, they offer a limited number of conversion ratios, making them challenging to use in actual systems since they often require multiple output voltages (to reduce power consumption) and use various input power sources (to maximize flexibility). In addition, maintaining both high efficiency and fast load response is difficult at low output current levels, which is critical for IoT devices as they often target low standby power to preserve battery charge. This paper presents a fully integrated power management system that converts an input voltage within a 0.9-to-4V range to 3 fixed output voltages: 0.6V, 1.2V, and 3.3V. A 7-stage binary-reconfigurable DC-DC converter [1-2] enables the wide input voltage range. Three-way dynamic frequency control maintains converter operation at near-optimum conversion efficiency under widely varying load conditions from 5nW to 500μW. A proposed load-proportional bias scheme helps maintain high efficiency at low output power, fast response time at high output power and retains stability across the entire operating range. Analog drop detectors improve load response time even at low output power, allowing the converter to avoid the need for external sleep/wakeup control signals. Within a range of 1-to-4V input voltage and 20nW-500μW output power, the converter shows >60% conversion efficiency, while maintaining responsiveness to a 100× sudden current increase.

A Resonant Current-Mode Wireless Power Receiver and Battery Charger With −32 dBm Sensitivity for Implantable Systems

Wireless power transfer for implantable systems must harvest very low power levels due to low incident power on human tissues and a small receiver coil size. This work proposes resonant current-mode charging to reduce minimum harvestable input power and increase power efficiency at low input power levels. Avoiding rectification and voltage regulation from conventional voltage-mode methods, this work resonates an LC tank for multiple cycles to build up energy, then directly charges a battery with inductor current. A prototype is fabricated in 0.18 μm CMOS technology. Minimum harvestable input power is 600 nW and maximum power efficiency is 67.6% at 4.2 μW input power. Power transmission through bovine tissue is measured to have negligible efficiency loss, making this technique amenable to implantable applications.

A 10 mm 3 Inductive Coupling Radio for Syringe-Implantable Smart Sensor Nodes

We present a near-field radio system for a millimeter-scale wireless smart sensor node that is implantable through a 14-gauge syringe needle. The proposed system integrates a radio system on chip and a magnetic antenna on a glass substrate within a total dimension of 1 × 1 × 10 mm3. We demonstrate energy-efficient active near-field wireless communication between the millimeter-scale sensor node and a base station device through an RF energy-absorbing tissue. The wireless transceiver, digital baseband controller, wakeup controller, on-chip baseband timer, sleep timer, and MBUS controller are all integrated on the SoC to form a millimeter-scale sensor node, together with a 1 × 8 mm2 magnetic antenna fabricated with a 1.5-μm-thickness gold on a 100 μm-thickness glass substrate. An asymmetric link is established pairing the sensor antenna with a codesigned 11 × 11 cm2 base station antenna to achieve a link distance of up to 50 cm for sensor transmission and 20 cm for sensor reception. The transmitter consumes a 43.5 μW average power at 2 kb/s, while the receiver power consumption is 36 μW with a -54 dBm sensitivity at 100 kb/s. When powered by a 1×2.2 mm2 thin-film battery (2 μAh, 4.1 V), the designed system has a two week expected lifetime without battery recharging when the system wakes up and transmits and receives 16 b data every 10 min.

Wide input range 1.7μW 1.2kS/s resistive sensor interface circuit with 1 cycle/sample logarithmic sub-ranging

A wide input range 1.7μW, 1.2kS/s resistive sensor interface circuit fabricated in 0.18μm CMOS is presented. This circuit consumes 6.6× lower power and 31.8× less energy than previous state-of-the-art work, considering the worst-case cycle count required for correct conversion. The proposed design uses a logarithmic subrange detector based on comparator metastability to convert an input resistance ranging from 10kΩ to 10MΩ in 1 cycle/sample.