N. Abel

Production of Pions, Kaons, and Protons in pp Collisions at s = 900 GeV with ALICE at the LHC

The production of π+, π−, K+, K−, p, and p at mid-rapidity has been measured in proton-proton collisions at √ s = 900 GeV with the ALICE detector. Particle identification is performed using the specific energy loss in the inner tracking silicon detector and the time projection chamber. In addition, time-of-flight information is used to identify hadrons at higher momenta. Finally, the distinctive kink topology of the weak decay of charged kaons is used for an alternative measurement of the kaon transverse momentum (pt) spectra. Since these various particle identification tools give the best separation capabilities over different momentum ranges, the results are combined to extract spectra from pt = 100 MeV/c to 2.5 GeV/c. The measured spectra are further compared with QCD-inspired models which yield a poor description. The total yields and the mean pt are compared with previous measurements, and the trends as a function of collision energy are discussed. tDeceased. uNow at Yale University, New Haven, CT, United States. vNow at University of Tsukuba, Tsukuba, Japan. wAlso at Centro Fermi – Centro Studi e Ricerche e Museo Storico della Fisica “Enrico Fermi”, Rome, Italy. xNow at Dipartimento Interateneo di Fisica ‘M. Merlin’ and Sezione INFN, Bari, Italy. yAlso at Laboratoire de Physique Subatomique et de Cosmologie (LPSC), Université Joseph Fourier, CNRS-IN2P3, Institut Polytechnique de Grenoble, Grenoble, France. zNow at Dipartimento di Fisica Sperimentale dell’Università and Sezione INFN, Turin, Italy. aaNow at Physics Department, Creighton University, Omaha, NE, United States. abNow at Commissariat à l’Energie Atomique, IRFU, Saclay, France. acAlso at Department of Physics, University of Oslo, Oslo, Norway. adNow at Physikalisches Institut, Ruprecht-Karls-Universität Heidelberg, Heidelberg, Germany. aeNow at Institut für Kernphysik, Technische Universität Darmstadt, Darmstadt, Germany. afNow at Department of Physics and Technology, University of Bergen, Bergen, Norway. agNow at Physics Department, University of Athens, Athens, Greece. ahAlso at Institut für Kernphysik, Westfälische Wilhelms-Universität Münster, Münster, Germany. aiNow at SUBATECH, Ecole des Mines de Nantes, Université de Nantes, CNRS-IN2P3, Nantes, France. ajNow at Université de Lyon, Université Lyon 1, CNRS/IN2P3, IPNLyon, Villeurbanne, France. akNow at: Centre de Calcul IN2P3, Lyon, France. alNow at Variable Energy Cyclotron Centre, Kolkata, India. amAlso at Dipartimento di Fisica dell’Università and Sezione INFN, Padova, Italy. anAlso at Sezione INFN, Bologna, Italy. aoAlso at Dipartimento di Fisica dell ́Università, Udine, Italy. apAlso at Wrocław University, Wrocław, Poland. aqNow at Dipartimento di Fisica dell’Università and Sezione INFN, Padova, Italy.

Design and Implementation of an Object-Oriented Framework for Dynamic Partial Reconfiguration

Although both DPR (dynamic partial reconfiguration) and HLS (high level synthesis) are important future trends regarding hardware design, they develop quite independently. Todays software-to-hardware compilers focus on conventional hardware and therefore have to remove dynamic aspects such as the instantiation of calculating modules at runtime. On the other hand, DPR tools are working on the lowest possible layer regarding FPGAs: the bitfile level. This paper focuses on the design and the implementation of a Framework combining the two technologies, since this has the potential to kill two birds with one stone. Firstly, DPR can change the programming paradigm in future HDLs regarding dynamic instantiations. Dynamic parts would not have to be removed any longer but could be realized on the target FPGA using DPR. Secondly, a high-level language support of DPR technologies could help end its shadowy existence and turn it into a commonly used method.

Increasing design changeability using dynamical partial reconfiguration

Recent questions of physics lead to the construction of high energy physic experiments like ALICE at CERN or CBM at FAIR. Since research goals evolve over the lifetime of such experiments, it must be possible to change the functionality of filters and other processing units after their installation. Hence, it has been common for years, to utilize reconfigurable FPGAs for data filtering and data forwarding. This paper illustrates how a dynamical partial reconfiguration framework can help to significantly increase the changeability of these FPGAs regarding typical data acquisition applications and algorithms, which finally leads to a better capacity utilization and thus enables cost and energy savings.

DPR in high energy physics

The active buffer project is part of the CBM (compressed baryonic matter) experiment and takes advantage of the DPR (dynamic partial reconfiguration) technology, in which a dynamic module can be reconfigured while the static part and other dynamic modules keep running untouched. Due to DPR, design flexibility and simplicity are achieved at the same time. The correctness and the performance have been verified by multiple tests.

Parallel hardware objects for dynamically partial reconfiguration

Many of todaypsilas software-to-hardware compiler projects try to find dataflow parallelism in a sequential program description and use it to generate parallel running hardware components. In this paper we present a new possibility to do a parallel description based on the combination of object-oriented programming and dynamically partial reconfiguration. Our compiler translates software objects directly to hardware objects, which are running in parallel and can be instantiated and removed dynamically. Furthermore, we focus on parallel inter object communication which allows the hardware objects to communicate in parallel.

An universal read-out controller

Since 2007 we design and develop a ROC (read-out controller) for FAIRs data-acquisition. While our first implementation solely focused on the nXYTER, today we are also designing and implementing readout logic for the GET4 which is supposed to be part of the ToF detector. Furthermore, we fully support both Ethernet and Optical transport as two transparent solutions. The usage of a strict modularization of the Read Out Controller enables us to provide an Universal ROC where front-end specific logic and transport logic can be combined in a very flexible way. Fault tolerance techniques are only required for some of those modules and hence are only implemented there.