Nabil Sghaier

Traps centers and deep defects contribution in current instabilities for AlGaN/GaN HEMT's on silicon and sapphire substrates

Abstract AlGaN/GaN high electron mobility transistors (HEMTs) with Si and Al 2 O 3 substrates reveals anomalies on I ds – V ds – T and I gs – V gs – T characteristics (degradation in drain current, kink effect, barrier height fluctuations, etc.). Stress and random telegraph signal (RTS) measurements prove the presence of trap centers responsible for drain current degradation. An explanation of the trapping mechanism responsible for current instabilities is proposed. Deep defects analysis performed by capacitance transient spectroscopy ( C -DLTS), frequency dispersion of the output conductance ( G ds ( f )), respectively, on gate/source and drain/source contacts and RTS prove the presence of deep defects localized, respectively, in the gate and in the channel regions. Defects detected by C -DLTS and G ds ( f ) are strongly correlated, respectively, to barrier height inhomogeneities and kink anomalies. Gate current analysis confirms the presence of ( G – R ) centers acting like traps at the interface GaN/AlGaN. Finally, the localization of these traps defects is proposed.

Study of Gate Oxide/Channel Interface Properties of SON MOSFETs by Random Telegraph Signal and Low Frequency Noise

The aim of this paper is the investigation of the gate stack properties of submicron MOSFETs integrated in silicon on nothing technology and the identification of traps responsible for the current fluctuations by random telegraph signal (RTS) technique and low frequency technique. We show that the analysis of devices having random discrete fluctuations in the drain current, the analysis of the RTS noise parameters (amplitude, high and low state durations, activation energy, capture cross section) as a function of bias voltage and temperature, allows us to characterize the traps located in the interface (HfO2-SiO2)/Si. The conventional technique consists of statistical treatment of the RTS time-domain data. The study of RTS noise in submicron SON MOS transistors offers the opportunity of studying the trapping/detrapping behavior of a single interface trap. Furthermore, it has convincingly been shown that this discrete switching of the drain current between a high and a low state is the basic feature responsible for l/fγ flicker noise in MOSFETs transistors.

Electrical characteristics and modelling of multi-island single-electron transistor using SIMON simulator

In this paper, we present a multi-island single-electron transistor (MISET) model based on the orthodox theory and solving the master equation. Using SIMON simulator, we investigate the electrical characteristics of single-electron transistors (SETs) based on multiple islands and show the temperature dependence of the Coulomb oscillation of the SET with one to six islands as a function of gate voltage Vg in the temperature range from T=5 to 50K. Values of current tend to increase proportionally with temperature. For a high drain voltage, the MISET behaved as a single-island device. This is probably because the multiple islands were electrically enlarged and merged into a single island owing to the high applied drain voltage. Finally, we compare the advantages of MISET face to single-island SETs with identical dimensions of islands.

Macro-modeling for the compact simulation of single electron transistor using SIMPLORER

In this paper we present analog and digital studies of the single electron transistor (SET), in which only one electron at the time is transferred through the circuit. In the first part of this paper, we show numerical simulations of fundamental characteristics of SET using MATLAB. As a second part of this work we develop a closely example of macro-model of SET using SIMPLORER. Our idea to concept this macro-model was based on the quantification of the output signal on the island level. In order to obtain a quantified output signal on the island we have modeled a quantum dots as a quantizer bloc. This signal quantified was correlated to the energy levels. This description of a model let us to valid our conception and to value the impact of quantizer bloc on the output response of the SET.

A new SIMPLORER model for single-electron transistors

In the first part of this paper, we present simulations of single-electron transistor (SET) output characteristic using Maple. Typical SET I-V characteristics and charge energies curves are presented by developing Maple programs. In the second part of this work, we develop a new model without considering quantum effects using the superposition theorem, transfer function and Laplace transformer. Finally, we propose a new bloc using SIMPLORER 7.0 simulator to modulate quantum effects in the SET island. This model is based on a parallel analog-digital converter.

Correlation between direct characteristic deficiencies and deep levels in 6H–SiC Schottky diodes

Abstract Excess current at low forward bias is observed for large area Ni Schottky diodes on n- and p-type 6H SiC. Random telegraph signal (RTS) measurements, carried out on these defective devices, show discrete time switching of the current. The traps signatures (Ea=0.35 eV, σ=1.17×10−18 cm2 for the n-type, Ea=0.43 eV, σ=1.8×10−20 cm2 for the p-type) extracted from DLTS measurement are very close to the one obtained from RTS. This strong correlation between the two different technique is attributed to the presence of an extended defect which presents different charge states (i.e. an extended defect decorated by punctual traps). This assumption is enforced by the DLTS measurements as a function of the filling time and as a function of the field.

Electrical characterization of deep levels in N and P 6H-SiC Schottky diodes

Excess current at low forward bias is observed for large-area Ni Schottky diodes on n- and p-type 6H-SiC. Random telegraph signal (RTS) measurements, carried out on these defective devices, show discrete time switching of the current. The trap signatures (Ea=0.35eV>, σ=1.17×10-18cm2 for n-type, Ea=0.43eV, σ=1.8×10-20cm2 for p-type) extracted from deep level transient spectroscopy (DLTS) measurement are very close to those obtained from RTS. This strong correlation between the two different techniques is attributed to the presence of an extended defect which presents different charge states (i.e. an extended defect decorated by punctual traps). This assumption is reinforced by the DLTS measurements as a function of the filling time and as a function of the field.

Deep Level Investigation by Current and Capacitance Transient Spectroscopy in 4H-SiC MESFETs on Semi-Insulating Substrates

In this paper we present static measurements fand defects analysis performed on 4H-SiC MESFETs on semi-insulating (SI) substrates containing vanadium. I d-Vds -T and I d-Vgs -T characteristics show anomalies (Threshold voltage shift, leakage current, degradation in saturation current...). Deep defects analysis performed by capacitive transient spectroscopy (C-DLTS) proves the presence of one deep defect called E1 with an activation energy 0.32eV. The studies of C-DLTS signal with pulse duration (t p) and polarization voltage (V r) confirm that E 1 trap is a point defect. Current transient spectroscopy (I-DLTS) performed in the same devices confirm E1 defect and shows the presence of six levels with activation energies ranging from 0.09eV to 1.01eV. The localization and the identification of these defects is presented. Finally, the correlation between the anomalies observed on output characteristics and defects is discussed.

Theoretical Analysis and Characterization of Multi-Islands Single-Electron Devices with Applications

A two- (2D) and three-dimensional (3D) multiple-tunnel junctions array is investigated. Device structure and electrical characteristics are described. We present a comparison of carriers transport through devices based on polymetallic grains based on master equation and the orthodox theory. The Coulomb blockade effect of 2D and 3D arrays is observed at low and high temperatures. The conduction mechanism is handled by the tunnel effect, and we adopt in addition the thermionic and Fowler-Nordheim emissions. Numerical simulation results focused on flash-memory and photodetector applications. Memory characteristics such as program/erase select gate operation are demonstrated in 2D devices. Also 3D array scheme is discussed for the high-density NCs scalable for photodetector application.

Time domain and frequency analysis of Random Telegraph Signal and the contributions of G-R Centres to I-V instabilities in 4H-SiC MESFETs

Our work is focused on the identification of defects responsible for current fluctuations at the origin of low frequency noise or random telegraphic signals in 4H-SiC MESFETs on semiinsulating (SI) substrates. We show that devices having instabilities have DC output characteristics with random discrete fluctuations of the drain current. The RTS noise parameters analysis (amplitude, high and low state time durations) as a function of temperature and bias voltage provides the signature of the involved traps (activation energy and cross section both for emission and capture). From the power spectral density of the drain current noise (PSD) we have measured the cut-off frequency of a single trap even at very low frequencies (from 0.1 Hz) and we propose that the noise responsible of RTS fluctuations is a generation-recombination noise. Finally, it is shown that the frequency analysis of the random telegraphic signal is a well-suited tool for the study of single defects in very small devices.