Network
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Publication
Featured researches published by Naoki Ono.
international symposium on microarchitecture | 1996
Toshio Kondo; Kazuhito Suguri; Mitsuo Ikeda; Tetsuya Abe; Hiroaki Matsuda; Tsuneo Okubo; Kenji Ogura; Yutaka Tashiro; Naoki Ono; Toshihiro Minami; Ritsu Kusaba; Takeshi Ikenaga; Nobutaro Shibata; Ryota Kasai; Koji Otsu; Fumiaki Nakagawa; Yasuhiko Sato
Our two-chip, real time, MPEG-2, simple-profile-at-main-level encoder supports NTSC 4:2:0 video signals with only three external memories. We have developed a compact encoder chip set. The key features of this chip set are a low encoding delay based on a simple profile at main level; wide-range motion estimation, which it performs using a hierarchical search; a flexible, macroblock level pipeline architecture based on RISC CPUs; and three small peripherals with no glue logic: a VRAM, synchronous DRAM, and FIFO DRAM.
Archive | 2011
Masaki Kitahara; Atsushi Shimizu; Naoki Ono
Archive | 2011
Masaki Kitahara; Atsushi Shimizu; Naoki Ono
Archive | 2011
Masaki Kitahara; Atsushi Shimizu; Naoki Ono
Archive | 2011
Atsushi Shimizu; Naoki Ono; Masaki Kitahara
Archive | 2014
Tokinobu Mitasaki; Naoki Ono; Atsushi Shimizu
Archive | 2014
Tokinobu Mitasaki; Naoki Ono; Atsushi Shimizu
Archive | 2014
Atsushi Shimizu; 淳 清水; Naoki Ono; 尚紀 小野; Masaki Kitahara; 正樹 北原
Archive | 2013
Naoki Ono; Atsushi Shimizu; Ken Nakamura; Masaki Kitahara; Seisuke Kyochi
Archive | 2013
Naoki Ono; Atsushi Shimizu; Ken Nakamura; Masaki Kitahara; Seisuke Kyochi