Naoto Saito

Mechanical stress simulation during gate formation of MOS devices considering crystallization-induced stress of phosphorus-doped silicon thin films

Mechanical stress in silicon substrates caused by thin-film deposition of gate material of MOS transistors is analyzed by the finite element method. The results reveal that to predict precise stress distribution, it is very important to take into account the intrinsic stress of the thin films used as gate material as well as thermal stress.

A two-dimensional thermal oxidation simulator using visco-elastic stress analysis

A two-dimensional thermal oxidation process simulation program, OXSIM2D, has been developed, taking into account viscoelastic material properties. Novel models for oxidation, stress dependency, and the white ribbon effect are introduced. The proposed approach can be used to analyze SiO/sub x/ growth on Si surfaces and the change in stress in the total structure, including the Si substrate. Simulation results showed good agreement with experiments for both a LOCOS and a shallow trench structure.<<ETX>>

Design method for high reliable flip chip BGA package

An efficient design method for flip chip ball grid array (BGA) packages has been developed. This method uses design of experiment (DOE), a series of finite element (FE) stress analyses based on an orthogonal array used in DOE, and statistical analysis. By using this method to design a BGA package having 1600 pins, the warpage of the optimum packaging structure is very small and all of the reliability demands are satisfied.

Minimization of X-Ray Mask Distortion by Two-Dimensional Finite Element Method Simulation

X-ray mask distortion caused by absorber stress is quantitatively analyzed by using two-dimensional simulation. Simulated results successfully predict the mask pattern distortion in practical mask structures. A square mask window is better than a circular one because the distortion for square windows can be minimized by reducing the pattern length. In addition, it is found that the maximum distortion is virtually the same regardless of the number of LSI chips within the square window mask.

Improvement of the reliability of the C4 for ultrahigh thermal conduction module with the direct solder-attached cooling system (DiSAC)

In the HITACHI MP6000 (HDS Skyline Trinium TM), the bipolar-CMOS processor dissipates about 600 W, and the new direct solder-attached cooling (named DiSAC) method has been developed for use with it. In this cooling method, the HDM is supported by the 97Sn/Ag C4 (or CCB; controlled collapse bonding) bumps, which are affected by almost all the deformation that occurs in the power on/off cycle. Hence, the fatigue life of the C4 bumps is most important in the application of this cooling method. In this paper, the causes of C4 bump strain are analyzed by the finite element method, and several techniques for reducing strain are simulated. A new method of estimating the fatigue life of the C4 connections, pseudo-elastic plastic creep analysis (EPC), is developed in order to improve the accuracy of fatigue life calculations, and is used to evaluate the creep strain in a 3D model. Using EPC and experimental C4 power cycle damage data, a new strain-fatigue life curve is defined. Process defects in the direct solder attachment are found to markedly shorten the fatigue life of the C4 connections, and the effects are estimated. All the technological developments presented are implemented in the DiSAC model, and the improvement in reliability is verified by experiment.

Development of a Zooming Analysis System using 3-dimentional Geometric Model.

This paper describes a zooming analysis system that uses a three-dimentional geometric model. A finite element analysis (FEA) using a zooming technique is needed for the estimatation of stresses in a very small area. However, it takes a long time to make an FEA mesh model and set the analysis conditions of any part of the model. We have developed a technique that automatically creates the FEA mesh model and sets the analysis conditions of any part of the model. In this system, a user inputs a geometry and analysis conditions of the entire model as well as the geometry of any part of the model and carries out a whole-model analysis and a detailed analysis of the target part. Employing this zooming technique significantly reduces the analysis time.

The development of a high-speed structural-analysis program, SIMUS

Abstract By putting supercomputers to use, there is a possibility of solving large-scale structural problems by the finite-element method at high computing speeds. The authors have developed a high-speed structural-analysis program, SIMUS, by applying algorithms suitable for supercomputers that have vector processors. To obtain a high processing speed by using vector processors, it is necessary to make the ratio of operation time in DO-loops to total execution time larger. It is therefore necessary to enhance the vectorized ratio. SIMUS has three characteristics for high-speed processing: 1. (1) the vectorized ratio and DO-loop ratio are enhanced; 2. (2) the number of repetitions in DO-loops is enlarged; 3. (3) plural calculators are used in parallel. As a result of applying four examples of linear-elastic stress analysis using this program, a vectorized ratio of 99% and a processing speed ratio in CPU time (scalar CPU/vector CPU) of 29 times are obtained for very large-scale problems, for example, over 10 4 D.O.F.