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Dive into the research topics where Naoya Chujo is active.

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Featured researches published by Naoya Chujo.


international symposium on neural networks | 1999

Neocognitron capable of position detection and vehicle recognition

Akihiro Watanabe; Michinori Andoh; Naoya Chujo; Yoshihisa Harata

We propose a vehicle recognition system using Neocognitron that is tolerant of deformations and shifts in position. For this system, we have developed a function of position detection and a method of supplementing partial features to occluded areas. The system recognizes multiple vehicles independently, even if vehicles are overlapped by other ones. Furthermore, it obtains positions of recognized vehicles in input images.


systems man and cybernetics | 2001

An iterative calculation method of neuron model with sigmoid function

Naoya Chujo; Susumu Kuroyanagi; Shinji Doki; Shigeru Okuma

Neural network hardware is necessary for demanding real-time applications such as pattern recognition. In the paper, an improved calculation algorithm of the neuron model with sigmoid function is proposed, which is suitable for hardware implementation. The algorithm is based on the multi dimensional binary search. The neuron circuits implemented on FPGA by the proposed algorithm have shown excellence in size and circuit frequency compared with the conventional circuits with sum of product operation.


international conference on industrial electronics control and instrumentation | 2000

An iterative calculation method of the neuron model for hardware implementation

Naoya Chujo; Susumu Kuroyanagi; Shinji Doki; Shigeru Okuma

Artificial neural networks (ANN) have the potential of parallel processing by the integrated circuit technology. Recently, over one million gates are available by the latest field programmable gate array (FPGA). However, the sum-of-product circuit used for evaluating the inputs of a neuron model is complex and not effective for hardware implementation by FPGAs. In this paper, an improved calculation algorithm of the perceptron-type neuron model is proposed, which is based on the multidimensional binary search. Since the search does not need the sum-of-product circuit, the designed neuron circuit is small and fast and is suitable for hardware implementation.


ieee international symposium on fault tolerant computing | 1988

Accelerated fault simulation by propagating disjoint fault-sets

Shigeharu Teshima; Naoya Chujo; Noriyoshi Sano; Hiroshi Nagase; Mitsuharu Takigawa

The authors propose a novel fault simulation method (the compressive method), which extends the idea of fault propagation on which the deductive and concurrent method are based. A fault set is used as a unit of fault propagation; it is a set of faults which cause the same effect on the primary outputs for a given input pattern. Thus, faults in the set are propagated in a lump, just like an individual fault in the concurrent method, and fault propagation is accelerated in proportion to number of elements in a fault set. The compressive method introduces union operation on the fault sets. The operation dynamically gathers faults into a fault set so that they are propagated in a bit unit. Fault simulation using this method provides better performance than the concurrent method; simulation time is shortened by 50-83% and memory storage is reduced by 50-80% in simulating a combinational circuit.<<ETX>>


Journal of Information Processing | 2012

Efficient Root Cause Detection in Complex Embedded Systems with Abstract Model-based Diagnosis

Takuro Kutsuna; Shuichi Sato; Naoya Chujo

The increasing complexity of embedded systems in information and communication technology causes a problem with locating faults during system failures. One reason for this problem is that system components that receive abnormal input data from other components may also output abnormal data, even if they are not in abnormal states, and consequently many redundant faults are detected in the system. In this paper, we present a diagnosis method for locating the origin of faults automatically in systems where fault propagation may occur. We use a model-based diagnosis scheme and abstract behavior modeling technique to deal with complex software components. We propose a new approach to diagnose systems that have data flow loops. Finally, we propose a one-stage approach for solving the abstract model-based diagnosis based on its formulation into the partial maximum satisfiability problem.


Archive | 1992

Scan path circuit

Naoya Chujo


Archive | 2008

Measurement device, measurement method, program, and computer readable medium

Koichiro Yamaguchi; Naoya Chujo; Kenichi Ohue


Archive | 2011

TASK EXECUTION CONTROLLER AND RECORDING MEDIUM ON WHICH TASK EXECUTION CONTROL PROGRAM IS RECORDED

Naoya Chujo; Masatoshi Kido


International Congress & Exposition | 1993

Development of a Class C Multiplex Control IC

Masaki Azuma; Yoshimi Takagi; Naoya Chujo; Akira Kawahashi


Archive | 2008

Device and associated methodology for measuring three-dimensional positions based on retrieved points from one view angle and positions and postures from another view angle

Koichiro Yamaguchi; Naoya Chujo; Kenichi Ohue

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Katsuhiko Kaji

Aichi Institute of Technology

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Katsuhiro Naito

Aichi Institute of Technology

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Susumu Kuroyanagi

Nagoya Institute of Technology

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Tadanori Mizuno

Aichi Institute of Technology

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