Nathan Schemm

A Handheld Neutron-Detection Sensor System Utilizing a New Class of Boron Carbide Diode

A handheld neutron-detection sensor application is described in this paper. The sensor system utilizes a new class of boron carbide diode that interacts with incoming neutrons. To interface with the boron carbide diode, an integrated front end is designed in a 1.5-mum standard CMOS technology. With the diode and front-end microchip, a handheld neutron-detection system was realized with an embedded microcontroller for real-time processing. The handheld detector operation was then tested with a plutonium-beryllium neutron source. Test and measurement results confirm the validity of the approach and the functionality of the design

A CMOS Imager With Focal Plane Compression Using Predictive Coding

This paper presents a CMOS image sensor with focal-plane compression. The design has a column-level architecture and it is based on predictive coding techniques for image decorrelation. The prediction operations are performed in the analog domain to avoid quantization noise and to decrease the area complexity of the circuit. The prediction residuals are quantized and encoded by a joint quantizer/coder circuit. To save area resources, the joint quantizer/coder circuit exploits common circuitry between a single-slope analog-to-digital converter (ADC) and a Golomb-Rice entropy coder. This combination of ADC and encoder allows the integration of the entropy coder at the column level. A prototype chip was fabricated in a 0.35 mum CMOS process. The output of the chip is a compressed bit stream. The test chip occupies a silicon area of 2.60 mm times 5.96 mm which includes an 80 times 44 APS array. Tests of the fabricated chip demonstrate the validity of the design.

A CMOS Image Sensor for Multi-Level Focal Plane Image Decomposition

An alternative image decomposition method that exploits prediction via nearby pixels has been integrated on the CMOS image sensor focal plane. The proposed focal plane decomposition is compared to the 2-D discrete wavelet transform (DWT) decomposition commonly used in state of the art compression schemes such as SPIHT and JPEG2000. The method achieves comparable compression performance with much lower computational complexity and allows image compression to be implemented directly on the sensor focal plane in a completely pixel parallel structure. A CMOS prototype chip has been fabricated and tested. The test results validate the pixel design and demonstrate that lossy prediction based focal plane image compression can be realized inside the sensor pixel array to achieve a high frame rate with much lower data readout volume. The features of the proposed decomposition scheme also benefit real-time, low rate and low power applications.

A hand-held neutron detection sensor system

In this paper, a hand-held neutron radiation sensor application is described. The sensor system utilizes a new class of boron-carbide diode that interacts with incoming neutrons. To interface with the boron-carbide diode an integrated front-end is designed in a 1.5mum standard CMOS technology. With the diode and front-end microchip, a hand-held neutron detection system was realized with an embedded microcontroller for realtime processing. The hand-held detector operation was then tested with a plutonium-beryllium neutron source. Testing results confirm the validity of the approach and the functionality of the design

The design of an ultra-low power buck regulator supporting dynamic voltage scaling for wireless sensor networks

The design of an ultra-low power buck regulator is proposed. The regulator is designed to be integrated with a single-chip wireless sensor network and provide high efficiency at low output currents to maximize the sensors battery life. The maximum output current is 50 mA. Dynamic voltage scaling is also supported to further reduce total power dissipation. The no-load current of the complete regulator is less than 1 µA. Simulation results give an expected efficiency of over 80% at 20µW of output power and a peak efficiency of over 95%.

The K-shell Auger electron spectrum of gadolinium obtained using neutron capture in a solid state device

Highly doped or alloyed Gd2O3 in HfO2 films form heterojunction diodes with silicon. Single neutron capture events can be identified with a Hf0.85Gd0.15O1.93 to n-type silicon heterojunction. With long pulse integration times and suppression of the smaller pulses, there is agreement between the key pulse height spectral features and those predicted by Monte Carlo simulations. The latter align very well with the decay channels of the Gd following neutron capture, particularly those involving the Gd K-shell Auger electron resonances.

A CMOS Front-End for a Lossy Image Compression Sensor

A CMOS image sensor has been designed to perform the front-end image decomposition in a prediction-SPIHT image compression scheme. The prediction circuitry based on charge sharing is integrated inside the sensor array to perform 3-level image decomposition. A CMOS test chip has been prototyped and tested. The test results justify the pixel design and demonstrate that lossy prediction based focal plane image compression can be realized inside the sensor pixel array to achieve a high frame rate but with much less data readout volume. Also, the sensor can be used to achieve comparable compression performance with much lower computational complexity compared to 2D discrete wavelet transform (DWT) based image compression.

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A complete low-power front end for particle detection applications is presented. The front end integrates a charge-sensitive amplifier with a novel adaptive biasing scheme that allows the dc bias currents to be scaled below conventional limits. A downstream peak detector circuit captures the peak value for each detection event, which is then fed to an integrated analog-to-digital converter (ADC). The event-driven ADC is shut off in between detection events to further reduce power consumption. The circuit has been fabricated using a 0.18- μm CMOS technology, with a power consumption ranging between 4 and 20 μW, depending on the particle detection rate. This low-power operation facilitates the development of compact long-life battery-powered remote particle sensors.

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This paper presents the design and test results of a standalone computational radiation sensor system based on a single chip solution. A low-power sensor front end with a charge sensitive amplifier and an event driven analog-to-digital converter is integrated on the same chip as a dedicated microcontroller to process and bin the data from the neutron detector diode heterojunction according to pulse height. This combination effectively implements a single chip multichannel analyzer with the capability to do further processing of the data in software. The design was fabricated in a 0.18 μm CMOS technology with field tests demonstrating the validity of the approaches taken. The total system power consumption is 24 μW.

CMOS Front End for Particle Detection Applications

A low-complexity circuit for on-sensor compression is presented. The proposed circuit achieves complexity savings by combining a single-slope analog-to-digital converter with a Golomb-Rice entropy encoder and by implementing a low-complexity adaptation rule. The adaptation rule monitors the output codewords and minimizes their length by incrementing or decrementing the value of the Golomb-Rice coding parameter k. Its hardware implementation is one order of magnitude lower than existing adaptive algorithms. The compression circuit has been fabricated using a 0.35 muM CMOS technology and occupies an area of 0.0918 . Test measurements confirm the validity of the design.