Naveen Naraharisetti

Concurrent Linearization: The State of the Art for Modeling and Linearization of Multiband Power Amplifiers

With the explosive growth of the smartphone and tablet markets, wide bandwidth voice and data communication have become ubiquitous. Users expect to use their wireless portable phone/computing devices at any place and at any time. Furthermore, with the todays economy of scale, yesterdays high-performance devices are todays entry-model devices.

FPGA Implementation of Orthogonal 2D Digital Predistortion System for Concurrent Dual-Band Power Amplifiers Based on Time-Division Multiplexing

A concurrent dual-band digital predistortion (DPD) system is presented to compensate for the nonlinearity of the radio-frequency power amplifiers (PAs) driven by a concurrent dual-band signal. Recently, a closed-form orthogonal polynomial basis has been introduced showing stability improvement compared with the conventional polynomial. An experimental test bed employing a field-programmable gate array (FPGA) linked to two mixed-signal system boards has also been presented. Based on the FPGA, this paper focuses on the hardware implementation of the new concurrent dual-band orthogonal DPD forward path using time-division multiplexing. Performances are evaluated with an experimental test setup cascading 1-10 W peak PAs and a dual-band signal center frequency spaced by 310 MHz. The lower side band (LSB) and upper side band (USB) are centered at 1890 and at 2200 MHz, respectively. Two signal scenarios are presented combining alternatively 1-carrier wide-band code-division multiple access (WCDMA) and 10-MHz long-term evolution (LTE) signals to a 5-carrier WCDMA signal. Experimental results show that the proposed time-division-multiplexing implementation approach gives similar performance compared with the software implementation with half of the resources. Adjacent channel power ratios (ACPRs) are reduced below -50 dBc and normalized mean-square error (NMSE) close to -40 dB.

Concurrent dual-band digital predistortion for power amplifier based on orthogonal polynomials

This paper presents a 2D digital predistortion system to compensate for the nonlinearity of the power amplifier driven by a concurrent dual-band signal. In order to improve the numerical stability of the system, we introduce a new orthogonal polynomial basis. The numerical stability of the new representation is compared to the conventional polynomial. An experimental test bench employing an FPGA linked to two mixed signal system boards is also presented. Performances are evaluated with an experimental test setup using a 10W peak power amplifier and a dual-band signal (single-carrier WCDMA and 3-carrier WCDMA) center frequency spaced by 310MHz. Experimental results show numerical stability improvement with the new 2D orthogonal basis.

Efficient Least-Squares 2-D-Cubic Spline for Concurrent Dual-Band Systems

This paper presents and compares two types of 2-D cubic-spline (2-D-CS) digital predistorters for linearizing a power amplifier (PA), which is used in dual-band transmitters. In the conventional 2-D-CS representation, the gain functions must be first extracted using an alternate basis, whereas in the proposed 2-D least-squares cubic-spline (2-D-LSCS) approach, a new 2-D-CS basis is introduced such that the basis weights can be extracted directly from the measured data using the least-squares method. The 2-D basis functions are calculated from 1-D basis functions to reduce the signal-processing resource usage in the real-time implementation. A field-programmable gate-array (FPGA) test bench integrating the concurrent dual-band RF system is utilized to verify the linearization performance of the new 2-D-LSCS predistorter. Two different test scenarios involving three carrier-wideband code division multiple access and long-term evolution signals, which are 310 MHz apart, are considered. The experimental results on a 10-W dual-band PA shows that the proposed 2-D-LSCS basis improves the performance up to 3 dB in both the adjacent channel power ratio and normalized mean square error with reduced FPGA resources and faster extraction time when compared to the conventional 2-D memory-polynomial and 2-D-CS approaches.

2D cubic spline implementation for concurrent dual-band system

This paper presents a 2D cubic-spline (2D C-spline) implementation of digital predistortion (DPD) for the linearization of power amplifier (PA) used in dual band transmitters. The implementation uses a 2D look up table (2D-LUT) for storing the coefficients of the 2D C-spline. The transmitted signals are assumed to be sufficiently spaced wide apart so that only the in-band distortion in both the channels need to be accounted for. The frequency selective technique is used to implement the DPD in each band as it reduces the sampling frequency requirement for the analog to digital converters (ADC) and digital to analog converters (DAC) used in the transmit and feedback paths. An FPGA testbench integrating the concurrent dual band RF system is utilized to verify the linearization performance of the 2D C-spline predistorter. The linearization of two wideband code division multiple access (WCDMA) signals which are 310 MHz apart is investigated. The experimental results shows that the intermodulation distortion products are reduced by 25 dBc for a 10 W dual-band PA.

2D forward twin nonlinear two-box model for concurrent dual-band digital predistortion

In this paper, a dual-band forward twin nonlinear two-box model is proposed to compensate for the nonlinearity of the power amplifier in concurrent dual-band signal mode. By taking into account nonlinear memory effects, the new dual-band digital predistortion (DPD) architecture improves the linearization performances of the 2D-Hammerstein model while reducing the complexity compared to the 2D-DPD model. An experimental test bench based on an FPGA is also presented. Linearization and complexity performances are evaluated and compared using a 10W peak power amplifier and a dual-band signal (single-carrier LTE and 3-carrier WCDMA) center frequency spaced by 310MHz. Results show a reduced complexity while achieving similar performances as 2D-DPD. Adjacent channel power ratios (ACPRs) are reduced below -50 dBc and normalized mean square error (NMSE) close to -40 dB.

Quasi-exact inverse PA model for digital predistorter linearization

This paper reports the first experimental application of the recently reported quasi-exact inverse (QEI) for memory-polynomial or memory-spline models in the design of a digital predistorter (DPD) linearizing a power amplifier (PA). In comparison to indirect learning architecture, where the coefficients of the DPD are extracted by swapping the input and output variable in any PA model, the DPD extraction is performed from the PA model directly. One of the advantages of using this scheme is that the output noise of the PA is not included in the regression matrix, thus improving the performance. In this paper, B-splines are used to extract the PA model since the performance of the DPD depends on the accuracy of the PA model. The new DPD algorithm relies on an arbitrary number of memory delays as needed for the QEI of the PA model. The evaluation of the models performance is conducted on a real time application. A Long Term Evolution (LTE) signal of 10 MHz bandwidth is used to compare the performance with a memory polynomial (MP) DPD model used in indirect learning architecture. The measurement results demonstrate that there is a noticeable improvement in terms of Normalised Mean Square Error (NMSE) and Adjacent Channel Power Ratio(ACPR) when using the QEI model for DPD. Note that this is achieved without any iteration as in practical DPD systems. Better results are possible when the PA model represents the PA behavior more accurately.

New supply modulation optimization methodology for concurrent dual band envelope tracking power amplifier

In this paper, the design, implementation, and measurement results of a concurrent dual-band envelope tracking (ET) system is presented. A GaN power amplifier (PA) is designed for concurrent dual-band operation. The iso-gain shaping functions for envelope tracking are then extracted from the characterization of the PA in each band. To investigate the envelope tracking performance under concurrent dual-band operation and establish the optimal dual-band shaping function, a new supply modulation scheme is proposed. An experimental test bench is also presented. The performances of the new schemes are evaluated with a dual-band signal based on a LTE signal with PAR of 10dB centered at 1892.8MHz and a WCDMA signal with PAR of 5dB centered at 2200MHz. Experimental results show 57 % average drain efficiency for peak output power of 36.6 dBm and 36.5 dBm.

2D quasi exact inverse of PA model in digital predistorter for concurrent dual-band system

This paper reports a new direct learning (DL) technique using 2D quasi exact inverse (2D-QEI) of a power amplifier (PA) model for linearizing concurrent dual band PA. In contrast to indirect learning (IL) architecture, where the coefficients are extracted by swapping the input and output signals in any PA model, a QEI of a PA model can be used in the digital predistorter (DPD). A 2D memory polynomial (2D-MP) is used in both the cases to compare the performance. The evaluation of the models performance is conducted on an application close to real base station using a field programmable gate array (FPGA) and two radio transceivers. A 10W PA is excited with two wideband code division multiple access (WCDMA) signals of 3.84MHz bandwidth which are 310 MHz apart. The measurement results demonstrate that in the presence of additive noise, there is a noticeable improvement in terms of normalized mean square error (NMSE) and adjacent channel power ratio (ACPR) when using the QEI model for DPD. This improvement is achieved in a single step with no iteration as in practical DPD systems.

Digitally modified filter-less receiver for 2D digital predistortion Of concurrent dual-band power amplifiers

Concurrent dual-band digital predistortion (DPD) is an interesting and popular approach for linearizing power amplifiers (PAs) driven by concurrent dual-band signals in wireless base stations and improving system efficiency. The predistorter kernel extraction requires accurate measurement of the output of PA. In order to observe each band of interest, an RF band-pass filter is placed before the down-converter of each observation receiver. These two filters, centered on each RF band, suppress the concurrent band signal that could fall into the band of interest and corrupt the predistorter extraction process. The use of hardware filter is not preferable in the context of Software Defined Radio (SDR) system which demands flexible topologies with fewer RF components. Therefore, we propose a novel digital modeling based approach to estimate the interfering signal and remove these RF filters. The signal of interest extracted in each band using the proposed method is further used for concurrent dual-band DPD. Performances are reported with an experimental test setup using a 10W power amplifier and 10 MHz LTE and 3-carrier WCDMA signals with 400MHz frequency separation.