Navneet Jain

Design space analysis of novel interconnect constructs for 22nm FDX technology

In this paper, we describe an integrated design space analysis approach consisting of full factorial layout generation, lithography simulations with added proximity effects, and rigorous statistical analysis through monte-carlo simulations which is used in the evaluating interconnects. This agile Design rule development process provides a quick turnaround time to down-select the potential layout configurations that can offer a competitive, robust and reliable design and manufacturing. Further layout and placement optimization is carried out to evaluate intra-cell, inter-cell and cell boundary situations, which are critical for a place and routed block. These interconnects developed using the integrated approach has been the key contributor to give 20-30% higher performance at the same Iddq leakage for 8T libraries compared to Single Diffusion break or Double Diffusion break based 12T libraries in 22FDX Technology.