Nelson E. Lourenco

Record maximum oscillation frequency in C-face epitaxial graphene transistors.

The maximum oscillation frequency (fmax) quantifies the practical upper bound for useful circuit operation. We report here an fmax of 70 GHz in transistors using epitaxial graphene grown on the C-face of SiC. This is a significant improvement over Si-face epitaxial graphene used in the prior high-frequency transistor studies, exemplifying the superior electronics potential of C-face epitaxial graphene. Careful transistor design using a high κ dielectric T-gate and self-aligned contacts further contributed to the record-breaking fmax.

Total Dose and Transient Response of SiGe HBTs from a New 4th-Generation, 90 nm SiGe BiCMOS Technology

The total ionizing dose and laser-induced transient response of a new 4th generation 90 nm IBM SiGe 9HP technology are investigated. Total dose testing was performed with 63.3 MeV protons at the Crocker Nuclear Laboratory at the University of California, Davis. Transient testing was performed on the two-photon absorption system at Naval Research Laboratory. Results show that the SiGe HBTs are dose-tolerant up to 3 Mrad(SiO2) and exhibit reduced single event transients compared to earlier SiGe generations.

An 8–16 GHz SiGe Low Noise Amplifier With Performance Tuning Capability for Mitigation of Radiation-Induced Performance Loss

We present a wideband, low noise amplifier (LNA) implemented in a Silicon-Germanium Heterojunction Bipolar Transistor (SiGe HBT) technology. This SiGe LNA covers a frequency range of 8-16 GHz and achieves a peak gain of 17.5 dB at nominal bias and a peak OIP3 of 15.8 dBm at 10 GHz at nominal bias. The noise figure (NF) of the LNA is 4.5-8.1 dB across band, and it nominally consumes 4 mA from a 4 V supply. Samples were irradiated with 63.3 MeV protons to proton-equivalent doses ranging from 200 krad(Si) to 2 Mrad(Si). This LNA incorporates bias control “tuning-knobs” to enable bias tuning to mitigate for RF performance loss due to total dose exposure and process variation in performance metrics. The effectiveness of the tuning “knobs” to compensate for lost post-irradiated performance was investigated. It was found that the LNA performance can be restored with the use of the tuning knobs with a performance tuning algorithm.

Single-Event Response of the SiGe HBT Operating in Inverse-Mode

The single-event effect sensitivity of inverse-mode biased SiGe HBTs in both bulk and SOI technology platforms are investigated, for the first time, using digital circuits and stand-alone device test structures. Comparisons of heavy-ion broad beam data of shift register circuits constructed with forward-mode and inverse-mode biased SiGe HBTs from a first-generation, complementary SOI SiGe BiCMOS process, reveal an improvement in SEU mitigation for the inverse-mode shift register architecture. Full 3D TCAD simulations highlight the differences in transient current origination between forward and inverse-mode biased devices, illustrating the impact of doping profiles on ion-induced shunt duration. To extend the analysis to a bulk platform, new fourth-generation npn , SiGe HBTs were biased in both the forward and inverse-mode and irradiated at NRL using the two photon absorption measurement system. These measurements support the analysis of transient origination using 3D TCAD simulations. Furthermore, the isolation of the output terminal from the sensitive subcollector-substrate junction is experimentally demonstrated for the inverse-mode bias. Fully coupled mixed-mode simulations predict a significant reduction in sensitive area for inverse-mode shift registers built in a bulk SiGe platform.

Design of Radiation-Hardened RF Low-Noise Amplifiers Using Inverse-Mode SiGe HBTs

A SiGe RF low-noise amplifier (LNA) with built-in tolerance to single-event transients is proposed. The LNA utilizes an inverse-mode SiGe HBT for the common-base transistor in a cascode core. This new cascode configuration exhibits reduced transient peaks and shorter transient durations compared to the conventional cascode one. The improved SET response was verified with through-wafer two-photon absorption pulsed-laser experiments and supported via mixed-mode TCAD simulations. In addition, analysis of the RF performance and the reliability issues associated with the inverse-mode operation further suggests this new cascode structure can be a strong contender for space-based applications. The LNA with the inverse-mode-based cascode core was fabricated in a 130 nm SiGe BiCMOS platform and has similar RF performance to the conventional schematic-based LNA, further validating the proposed approach.

An Investigation of Single-Event Effects and Potential SEU Mitigation Strategies in Fourth-Generation, 90 nm SiGe BiCMOS

The single-event effect sensitivity of fourth-generation, 90 nm SiGe HBTs is investigated. Inverse-mode, ≥1.0 Gbps SiGe digital logic using standard, unoptimized, fourth-generation SiGe HBTs is demonstrated and the inverse-mode shift register exhibited a reduction in bit-error cross section across all ion-strike LETs. Ion-strike simulations on dc calibrated, 3-D TCAD SiGe HBT models show a reduction in peak current transient magnitude and a reduction in overall transient duration for bulk SiGe HBTs operating in inverse mode. These improvements in device-level SETs are attributed to the electrical isolation of the physical emitter from the subcollector-substrate junction and the high doping in the SiGe HBT base and emitter, suggesting that SiGe BiCMOS technology scaling will drive further improvements in inverse-mode device and circuit-level SEE. Two-photon absorption experiments at NRL support the transient mechanisms described in the device-level TCAD simulations. Fully-coupled mixed-mode simulations predict large improvements in circuit-level SEU for inverse-mode SiGe HBTs in multi-Gbps, inverse-mode digital logic.

Lifetime Studies of 130 nm nMOS Transistors Intended for Long-Duration, Cryogenic High-Energy Physics Experiments

Future neutrino physics experiments intend to use unprecedented volumes of liquid argon to fill a time projection chamber in an underground facility. To increase performance, integrated readout electronics should work inside the cryostat. Due to the scale and cost associated with evacuating and filling the cryostat, the electronics will be unserviceable for the duration of the experiment. Therefore, the lifetimes of these circuits must be well in excess of 20 years. The principle mechanism for lifetime degradation of MOSFET devices and circuits operating at cryogenic temperatures is via hot carrier degradation. Choosing a process technology that is, as much as possible, immune to such degradation and developing design techniques to avoid exposure to such damage are the goals. This requires careful investigation and a basic understanding of the mechanisms that underlie hot carrier degradation and the secondary effects they cause in circuits. In this work, commercially available 130 nm nMOS transistors operating at cryogenic temperatures are investigated. The results show that the difference in lifetime for room temperature operation and cryogenic operation for this process are not great and the lifetimes at both 300 K and at 77 K can be projected to more than 20 years at the nominal voltage (1.5 V) for this technology.

Single-Event Transient and Total Dose Response of Precision Voltage Reference Circuits Designed in a 90-nm SiGe BiCMOS Technology

This paper presents an investigation of the impact of single-event transients (SETs) and total ionization dose (TID) on precision voltage reference circuits designed in a fourth-generation, 90-nm SiGe BiCMOS technology. A first-order uncompensated bandgap reference (BGR) circuit is used to benchmark the SET and TID responses of these voltage reference circuits (VRCs). Based on the first-order BGR radiation response, new circuit-level radiation-hardening-by-design (RHBD) techniques are proposed. An RHBD technique using inverse-mode (IM) transistors is demonstrated in a BGR circuit. In addition, a PIN diode VRC is presented as a potential SET and TID tolerant, circuit-level RHBD alternative.

Evaluation of Enhanced Low Dose Rate Sensitivity in Fourth-Generation SiGe HBTs

The total ionizing dose response of 4th-generation SiGe HBTs is assessed at both low and high dose rates to evaluate enhanced low dose rate sensitivity (ELDRS) in a new SiGe BiCMOS technology. Both device and circuit results are presented. A bandgap reference circuit topology is chosen to monitor for ELDRS in TID-induced collector current shifts, which have previously been reported in low dose rate studies of SiGe HBTs. The results in this paper also cover previous technology generations from this foundry in order to incorporate a broader view of dose rate effects in SiGe HBTs. No indication of ELDRS was found in any technology generation.

Impact of Technology Scaling in sub-100 nm nMOSFETs on Total-Dose Radiation Response and Hot-Carrier Reliability

The total-dose radiation tolerance of 32-nm nFETs is investigated. nFETs built in 32-nm RF-CMOS-on-SOI technology with high-k dielectrics show increased off-state leakage current and electron trapping in the gate oxide. The impact of CMOS-on-SOI technology scaling (from 65-nm to 32-nm) on the total-dose radiation tolerance and hot-carrier reliability (HCR) is investigated through both experiments and supporting TCAD simulations. The 32-nm nFETs exhibit less total-dose degradation compared to 45-nm nFETs. However, the hot-carrier degradation increases as the technology scales. An interplay of electric-field in the gate oxide and impact ionization in the channel region is responsible for the observed differences in the degradation mechanisms for the three technologies.