Nicolas Butzen

12.2 A 94.6%-efficiency fully integrated switched-capacitor DC-DC converter in baseline 40nm CMOS using scalable parasitic charge redistribution

This work introduces a scalable parasitic charge-redistribution technique that is able to significantly increase the efficiency of integrated SC converters. A circuit has been fabricated in a 40nm baseline CMOS process that demonstrates the presented technique and advances the state-of-the-art by achieving a very high efficiency for fully-integrated SC converters of 94.6%.

When hardware is free, power is expensive! Is integrated power management the solution?

In the last several years, significant efforts and advances have been made towards the CMOS integration of power converters. In this paper, an overview is given of what might be considered the next step in this domain: AC-DC conversion, efficient high-ratio voltage conversion, wide operating range and energy storage for energy scavenging. The main focus is on CMOS integration as this is the ultimate goal from any system integration point of view. Also, an overview of the state of the art will be discussed.

Monolithic switched-capacitor DC-DC towards high voltage conversion ratios

Recent research has introduced switched-capacitor DC-DC converters with voltage conversion ratios (VCR) of up to 8. Their ability to implement any given voltage conversion ratio at a duty cycle of 50% shows promise to employ them in very high voltage conversion ratio applications. This is due to the fact that the VCR is a result of the switched-capacitor topology being used, instead of the Pulse Width Modulation (PWM) duty cycle as is the case with inductive DC-DC converters. This work aims to investigate the potential and feasibility of switched-capacitor topologies towards a monolithically integrated high voltage conversion ratio switched-capacitor DC-DC converter. Essential topology parameters and metrics that influence performance in this context are identified and their relation as function of the voltage conversion ratio is investigated. A comparison over a set of well-performing SC topologies yields a clear result, demonstrating a topology that circumvents technological weakness with topological strength and vice versa.

Scalable Parasitic Charge Redistribution: Design of High-Efficiency Fully Integrated Switched-Capacitor DC–DC Converters

This paper introduces a technique, called scalable parasitic charge redistribution (SPCR), that reduces the parasitic bottom-plate losses in fully integrated switched-capacitor (SC) voltage regulators up to any desired level. This is realized by continuously redistributing the parasitic charge in-between phase-shifted converter cores. Because earlier models described the ratio of this parasitic coupling to the flying capacitance as the only limiting factor on the achievable fully integrated efficiency, the use of SPCR allows SC converters to achieve efficiencies previously deemed impossible. Transistor leakage is shown to be another limiting factor and is added to existing models which are then used to prove the effectiveness of SPCR over a wide range of power densities (up to 10 W/mm2) and technological parameters. The implementation of SPCR requires little overhead thanks to the use of charge redistribution buses. A 1/2 converter is fabricated in a 40 nm bulk CMOS technology that demonstrates SPCR by achieving a record efficiency for fully integrated closed-loop SC converters of 94.6%.

MIMO Switched-Capacitor converter using only parasitic capacitance with Scalable Parasitic Charge Redistribution

In this work a Multiple-Input Multiple-Output (MIMO) Switched-Capacitor (SC) converter is presented that generates Multiple DC voltages using only the parasitic capacitances already present in fully-integrated SC converters. In combination with the Scalable Parasitic Charge Redistribution technique, the presented MIMO converter can provide voltage rails for control blocks or clock generation in low-power SC converters, without any area overhead. The proposed converter only makes use of existing blocks and therefore only adds conductive losses, which means that for low output powers, efficiencies close to 100% can be achieved. A theoretical analysis of the converter is given and used to prove the efficiency of the converter compared to regular SC MIMO converters. The working principle of the proposed MIMO converter is verified with measurements, demonstrating a peak efficiency of 98.9%.

10.1 A 1.1W/mm 2 -power-density 82%-efficiency fully integrated 3∶1 Switched-Capacitor DC-DC converter in baseline 28nm CMOS using Stage Outphasing and Multiphase Soft-Charging

Over the past years, delivering power to integrated circuits has become increasingly difficult. With the current intake of many modern-day applications growing each new process generation, the Power Delivery Network (PDN) losses have increased as well. By integrating a DC-DC converter together with the load, part of the required voltage conversion can be realized on-chip, and the current intake, together with the PDN losses, can thus ideally be reduced by its Voltage Conversion Ratio (VCR). In order to be viable, though, the converter must 1) have a high efficiency and VCR such that its losses are smaller than the reduction of PDN losses, 2) limit the area overhead by achieving high power density and 3) rely only on commonly available devices to enable wide-spread use.

Fully integrated power management: The missing link?

The integration level of electronic systems has continually increased over the past years, leading to significant reductions in cost, size and power consumption of consumer applications. One block, however, is still mostly implemented using discrete components: the Power Management Unit. This paper analyses the benefits of monolithic power management together with the main bottlenecks, and demonstrates how the latest research efforts in system- and circuit-level techniques pave the way for their wide-spread use.

MIMO Switched-Capacitor DC–DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution

This paper presents a multiple-input multiple-output (MIMO) switched-capacitor (SC) dc–dc converter that only uses the parasitic capacitance already present in fully integrated SC power converters to generate multiple dc voltages. When used in an SC converter together with the scalable parasitic charge redistribution technique, the presented MIMO converter provides additional voltage rails, which can be used to power gate drivers or control blocks without any area overhead. Moreover, because the proposed converter only makes use of elements, which are already present in fully integrated SC converters, only conductive losses are introduced. This means that, for low output powers, efficiencies arbitrarily close to 100% can be achieved. The presented type of converter is characterized using an MIMO model, which is, in turn, used to prove the efficiency of the converter compared with regular SC MIMO converters, particularly for a large number of inputs or outputs. Measurements verify the basic working principle of the presented converter, demonstrating a peak efficiency of 98.9% and output powers sufficient to power internal converter blocks.