Hans Meyvaert

A 1.65W fully integrated 90nm Bulk CMOS Intrinsic Charge Recycling capacitive DC-DC converter: Design & techniques for high power density

A fully integrated high power density capacitive 2∶1 step-down DC-DC converter is designed in a standard Bulk CMOS technology. The implemented converter can deliver a maximum output power of 1.65W on a chip area of 2.14mm2, resulting in a power conversion density of 0.77W/mm2. Besides the primary goal of high power density a peak power conversion efficiency of 69% is achieved. This for a voltage step-down conversion from twice the nominal supply voltage of a 90nm technology (2Vdd = 2.4V) to 1V. Both the design as the implementation techniques to achieve the resulting power density, are discussed.

A Light-Load-Efficient 11/1 Switched-Capacitor DC-DC Converter With 94.7% Efficiency While Delivering 100 mW at 3.3 V

This paper demonstrates a 2-phase 11/1 switched-capacitor (SC) DC-DC converter that provides an output voltage VOUT of 3.3 V from an input voltage VIN in the range of 37.4 V-39 V . SC converters, unlike their inductive buck counterparts, do not rely on the pulse-width modulation (PWM) duty cycle to set the voltage conversion ratio (VCR) as this is determined by the SC converter topology. Consequently, SC DC-DC converters do not require a very low duty cycle, resulting in a short ton for the full-input-voltage-rated high-side switch and significant driver power consumption. Instead, a two-phase SC converter is found to be an excellent candidate for high-ratio voltage conversion as it maintains a 50% duty cycle and exchanges few components of high voltage rating with more that are rated for lower voltage.

A monolithic 0.77W/mm 2 power dense capacitive DC-DC step-down converter in 90nm Bulk CMOS

A fully integrated capacitive DC-DC converter reporting an output power of 1.65W in a standard 90nm Bulk CMOS process is realized. This converter implements a 2:1 voltage step-down conversion from twice the nominal technology supply voltage. Peak power conversion efficiency was measured to be 69%. The chip measures 2.14mm2 including 12nF implemented in standard available MOS capacitors. These baseline MOS capacitors, along with the introduced Flying Well approach and the Intrinsic Charge Recycling approach, result in a maximum power density of 0.77W/mm2. The converter is controllable through an on-chip voltage controlled oscillator (VCO) generating the clock signals for each of the 21 interleaved converter cores of this multiphase implementation. The implemented core interleaving allows for an output voltage ripple smaller than 8% of Vo without any dedicated output smoothing capacitor, saving die area and thus boosting the power density.

A 1.65 W fully integrated 90 nm bulk cmos capacitive DC-DC converter with intrinsic charge recycling

A fully integrated high power density capacitive 2:1 step-down DC-DC converter is designed in a standard CMOS technology. The converter implements the presented flying well technique and intrinsic charge recycling technique to deliver a maximum output power of 1.65 W on a chip area of 2.14 mm2, resulting in a power conversion density of 0.77 W/mm2 . A peak power conversion efficiency of 69% is achieved, leading to an efficiency enhancement factor of +36% with respect to a linear regulator. This is for a voltage step-down conversion from twice the nominal supply voltage of a 90 nm technology (2Vdd = 2.4 V) to 1 V.

20.1 A light-load-efficient 11/1 switched-capacitor DC-DC converter with 94.7% efficiency while delivering 100mW at 3.3V

Getting from the mains to a few volts to power electronic circuits requires a very large voltage conversion ratio since the rectified US and EU mains have DC levels of 169V and 325V, respectively. Primary converters, such as flyback converters, use the winding ratio of the isolation transformer to achieve large step-down ratios and generate bus voltages of about 12V. The higher the bus voltage, the higher the efficiency of the primary converter can be and the lower the bus impedance loss. This motivates the investigation of highly efficient DC-DC converters with high voltage conversion ratios (VCRs) to use as secondary converters in AC-DC applications.

When hardware is free, power is expensive! Is integrated power management the solution?

In the last several years, significant efforts and advances have been made towards the CMOS integration of power converters. In this paper, an overview is given of what might be considered the next step in this domain: AC-DC conversion, efficient high-ratio voltage conversion, wide operating range and energy storage for energy scavenging. The main focus is on CMOS integration as this is the ultimate goal from any system integration point of view. Also, an overview of the state of the art will be discussed.

Monolithic switched-capacitor DC-DC towards high voltage conversion ratios

Recent research has introduced switched-capacitor DC-DC converters with voltage conversion ratios (VCR) of up to 8. Their ability to implement any given voltage conversion ratio at a duty cycle of 50% shows promise to employ them in very high voltage conversion ratio applications. This is due to the fact that the VCR is a result of the switched-capacitor topology being used, instead of the Pulse Width Modulation (PWM) duty cycle as is the case with inductive DC-DC converters. This work aims to investigate the potential and feasibility of switched-capacitor topologies towards a monolithically integrated high voltage conversion ratio switched-capacitor DC-DC converter. Essential topology parameters and metrics that influence performance in this context are identified and their relation as function of the voltage conversion ratio is investigated. A comparison over a set of well-performing SC topologies yields a clear result, demonstrating a topology that circumvents technological weakness with topological strength and vice versa.

DC-DC converters: From discrete towards fully integrated CMOS

Monolithic integration of electronic systems is one of the major techniques to reduce cost, size and power consumption in state-of-the-art consumer applications. Integration of transceivers and other mixed-signal building blocks has proven to be a very successful approach to build low cost, compact and portable systems [1]. Remarkably a certain building block remains discrete in commercial applications: the switched-power supply. This paper will demonstrate how recent research efforts cleared the path to develop fully integrated DC-DC converters in standard CMOS.

Monolithic power management front end with high voltage dense energy storage for wireless powering

A monolithic power management system is proposed, enabling an energy storage density improvement of more than an order of magnitude with respect to the current state of the art. This is made possible by increasing the storage voltage Vbat towards 10V. A proof of concept prototype was designed in a 90nm bulk CMOS technology with an integrated 1.8mm dipole antenna using the surrounding energy available in the 5.8GHz ISM band. In order to achieve the large voltage conversion under aim of less than 100mV to 10V, a two stage approach is found necessary as the input impedance mismatch of a single stage passive voltage multiplier with the antenna would render the solution infeasible. First, the antenna voltage is passively rectified and multiplied to an intermediate system supply voltage VPMU of 1.2V, aftwer which this voltage is pumped up to the storage voltage level Vbat of 10V by an active DC-DC converter. This, for a minimal system startup voltage of 53mV.

High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby

This book describes synergetic innovation opportunities offered by combining the field of power conversion with the field of integrated circuit (IC) design. The authors demonstrate how integrating circuits enables increased operation frequency, which can be exploited in power converters to reduce drastically the size of the discrete passive components. The authors introduce multiple power converter circuits, which are very compact as result of their high level of integration. First, the limits of high-power-density low-voltage monolithic switched-capacitor DC-DC conversion are investigated to enable on-chip power granularization. AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully. Discusses high-power-density monolithic switched-capacitor DC-DC conversion in bulk CMOS, including a theoretical analysis of the impact of the most important loss contribution, the bottom-plate parasitic coupling; Describes advances on AC-DC conversion in a monolithic single-stage solution, as well as a highly-integrated two-stage approach; Includes theoretical analysis and comparison of monolithic switched-capacitor DC-DC converter topologies toward high-ratio voltage conversion