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Dive into the research topics where T. Trajkovic is active.

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Featured researches published by T. Trajkovic.


international electron devices meeting | 2004

High voltage devices - a milestone concept in power ICs

Florin Udrea; T. Trajkovic; G.A.J. Amaratunga

We report for the first time a technology concept in power ICs. We present detailed experimental data obtained during several years of development and demonstrate the application of the new technology in a range of highly efficient switch mode power supplies (SMPS). This technology is capable of delivering more than 3 times higher current density (30 A/cm/sup 2/), and two to five times the switching speed (500 kHz for 650V rated devices) of state-of-the-art power IC technologies such as junction-isolation or silicon-on-insulator. The new concept is based on merging of the MEMS and CMOS SOI technologies to increase the breakdown ability of the power device and reduce its output capacitance. The MEMS step is fully CMOS compatible and consists of a back-side deep reactive ion etching (DRIE) performed selectively in the drift region of the power device to realize multiple membranes of ultra-thin silicon-dielectric films.


international symposium on power semiconductor devices and ic's | 2005

Ultra-fast LIGBTs and superjunction devices in membrane technology

Florin Udrea; T. Trajkovic; C. Lee; D.M. Garner; X Yuan; J. Joyce; Nishad Udugampola; G. Bonnet; David Robert Coulson; Russell Jacques; M. Izmajlowicz; N. van der Duijn Schouten; Z. Ansari; P. Moyse; G.A.J. Amaratunga

Back-side etching of the entire silicon substrate under part of the drift region of a SOI power device was first proposed by Udrea and Amararunga (2004) and experimentally reported by Udrea et al. (2005). This technology concept enables high voltage devices to be embedded in a thin silicon/oxide membrane resulting in very significant improvements in breakdown ability and switching speed. This paper presents new results from advanced membrane high power devices and fully functional power ICs. Furthermore, record switching speeds for the LIGBT are reported. The feasibility of realising superjunction structures (3D Resurf) with breakdown capability in excess of 700V using this technology are also demonstrated


IEEE Electron Device Letters | 1999

1.2 kV trench insulated gate bipolar transistors (IGBT's) with ultralow on-resistance

Florin Udrea; S.S.M. Chan; J. Thomson; T. Trajkovic; P. Waind; G.A.J. Amaratunga; D.E. Crees

In this letter, we report the full development of 1.2 kV Trench IGBTs with ultralow on-resistance, latch-up free operation and highly superior overall performance when compared to state of the art IGBTs. The minimum forward voltage drop at the standard current density of 100 A/cm/sup 2/ was 1.1 V for nonirradiated devices and 2.1 V for irradiated devices. The maximum controllable current density was in excess of 1000 A/cm/sup 2/.


international symposium on power semiconductor devices and ic s | 2001

Ultra-high voltage device termination using the 3D RESURF (super-junction) concept - experimental demonstration at 6.5 kV

Florin Udrea; T. Trajkovic; J. Thomson; L. Coulbeck; P. Waind; G.A.J. Amaratunga; P. Taylor

We propose here and experimentally demonstrate a novel breakdown termination termed The 3D-RESURF Termination that can be applied to a large class of high to ultra-high voltage devices, such as diodes, thyristors, IGBTs, etc. The novel termination is based on the 3D RESURF concept (lateral super-junction) proposed by us and others for lateral integrable devices. We have fabricated vertical diodes and IGBTs rated at 6.5 kV and demonstrated that the use of 3D RESURF p and n layers placed between adjacent p+ floating rings resulted in maximum breakdown voltage (6.5 kV). This is 2.5 kV larger than the breakdown voltage obtained from a standard field ring terminated device fabricated side by side on the same chip. Moreover, the 3D-RESURF edge termination uses a total length of 1 mm, which is only 60% of standard 6.5 kV JTE terminations. This results in area saving of up to 40%, depending on the active area of the chip.


international symposium on power semiconductor devices and ic's | 2008

Thick silicon membrane technology for reliable and high performance operation of high voltage LIGBTs in Power ICs

T. Trajkovic; Florin Udrea; C. Lee; Nishad Udugampola; V. Pafhirana; A. Mihaila; G.A.J. Amaratunga

A step change in performance and reliability of thick SOI membrane devices compared to earlier generation of devices on ultra-thin SOI membranes is reported in here. The membrane concept first reported offered a landmark improvement in the trade-off between switching losses and breakdown capability (in excess of 700V) but its current capability was limited by the thickness of the silicon membrane (around 30 A/cm2 for LIGBTs on 0.25 mum silicon membranes, achieving a loss related power density approaching 100 W/cm2 ). This paper reports on membrane power devices with current densities which approach the best of those offered by vertical devices (current density greater than 100 A/cm with power density of 180 W/cm2 ), without sacrificing switching speed (toff < 60 ns for 1.5 mum membranes). HTRB results showing 1000 h+ operation at 125degC at 80% of the rated voltage are also presented. Finally, it is shown that both the static and dynamic high temperature operation of thick membrane LIGBTs is superior to that of state-of-the-art integrated LDMOSFETs.


international semiconductor conference | 2002

Buried field rings - a novel edge termination method for 4H-SiC high voltage devices

A. Mihaila; Florin Udrea; P. Godignon; T. Trajkovic; G. Brezeanu; A. Rusu; J. Rebollo; J. Millan

This paper is concerned with a numerical study of a novel edge breakdown termination technique for 4H-SiC high voltage devices. Buried field rings (BFRs) are proposed to be used, for the first time, in SiC devices as an effective termination method and the concept is numerically demonstrated for 4H-SiC MESA JFET structures. By using 4 BFRs for a MESA JFET, a breakdown voltage of 1,590 V has been achieved, representing more than 90% of the ideal bulk breakdown value (1,750 V). The influence of the buried rings doping on the blocking mode behaviour and the effect of the SiC/SiO/sub 2/ interface charge on the breakdown voltage are studied. It is evidenced that the BFR termination offers a very stable blocking mode behaviour and the influence of processing conditions on its over-all performance is negligible. For comparison, some results for guard rings and junction termination extension are also presented.


International Journal of Electronics | 1999

Silicon MOS controlled bipolar power switching devices using trench technology

T. Trajkovic; Florin Udrea; G.A.J. Amaratunga; W. I. Milne; S.S.M. Chan; P. Waind; J. Thomson; D.E. Crees

The next generation of power devices are likely to extend MOS controlled bipolar (MCB) device concepts to cover very high voltage (up to 8kV) applications. Such devices will be based on utilizing the advantages brought about by trench gate MOSFETs to control bipolar current flow. In this paper we give a review of development of trench gate IGBTs and we describe briefly new promising device structures based on trench technology which use PIN diode and thyristor type carrier distributions to reduce power losses within the device.


international symposium on power semiconductor devices and ic s | 1999

1.4 kV, 25 A, PT and NPT trench IGBTs with optimum forward characteristics

Florin Udrea; P. Waind; J. Thomson; T. Trajkovic; S.S.M. Chan; S. Huang; G.A.J. Amaratunga

In this paper, we report the development of 1.4 kV 25 A punch-through (PT) and nonpunch-through (NPT) trench IGBTs with ultra-low on-resistance, latch-up free operation and highly superior overall performance when compared to previously reported DMOS IGBTs in the same class. We have fabricated both PT and transparent anode NPT devices to cover a wide range of applications which require very low on-state losses or very fast time with ultra-low switching losses. The minimum forward voltage drop at the standard current density of 100 A/cm/sup 2/ was 1.1 V for PT nonirradiated devices and 2.1 V for 16 MRad PT irradiated devices. The nonirradiated transparent emitter NPT structure has a typical forward voltage drop of 2.2 V, a turn-off time below 100 ns and turn-off energy losses of 11.2 mW/cm/sup 2/ at 125 C. The maximum controllable current density was in excess of 1000 A/cm/sup 2/.


european conference on power electronics and applications | 2014

Avalanche ruggedness of 800V Lateral IGBTs in bulk Si

Gianluca Camuso; Nishad Udugampola; Vasantha Pathirana; T. Trajkovic; Florin Udrea

Avalanche capability of 800V rated Lateral IGBTs (LIGBTs) fabricated using bulk CMOS technology has been investigated for the first time for both turn-on and turn-off. The LIGBTs have been designed for 65kHz operation in energy-efficient, compact off-line power supplies. Measurements of the device during turn-on revealed failures under high line voltages. The device was analysed using a combination of measurements and simulations which revealed that the dynamic avalanche was the cause of failure. An optimised LIGBT has been designed, simulated, fabricated and tested. The optimised device exhibits higher breakdown voltage and improved turn-on avalanche capability. Moreover, the optimised device showed improved avalanche capability during turn-off and reduced likelihood of latch-up.


IEEE Transactions on Electron Devices | 2017

High-Voltage Integrated Circuits: History, State of the Art, and Future Prospects

Don Disney; Ted Letavic; T. Trajkovic; Tomohide Terashima; Akio Nakagawa

High-voltage ICs (HVICs) are used in many applications, including ac/dc conversion, off-line LED lighting, and gate drivers for power modules. This paper describes the technologies most commonly used in commercial HVICs, including junction-isolation, thin silicon-on-insulator (SOI), and thick SOI approaches. Emerging technologies such as thin silicon membrane are also discussed.

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Florin Udrea

University of Cambridge

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Florin Udrea

University of Cambridge

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A. Mihaila

University of Cambridge

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C. Lee

University of Cambridge

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