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Dive into the research topics where Nishant Lakhera is active.

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Featured researches published by Nishant Lakhera.


electronic components and technology conference | 2015

Resolution of extreme warpage in ultra-thin molded array packages under High Temperature Storage Life

Nishant Lakhera; Sandeep Shantaram; Akhilesh K. Singh

The semiconductor industry is demanding miniaturization coupled with increased functionality from microelectronic packages. Ultra-thin molded array packages (TMAP) with package thickness ≤ 500 μm are desirable for applications where system integration space is limited. Such ultra-thin packages require careful selection of the epoxy molding compound (EMC) to control strip level and package level warpage. In this work, the ultra-thin MAP package (8 mm × 8 mm) has an EMC thickness of 0.250 ± 0.025 mm, substrate thickness of 0.105 ± 0.025 mm, and 0.076 mm thick die. This package was found to exhibit extreme “smiley-face” warpage (solder balls down) of 160 μm after 175°C, 504 hrs High Temperature Storage Life (HTSL) conditions, resulting in problems with automated package pick-up by the test handler arm during electrical testing. The warpage was permanent and no relaxation was observed even after one month of storage at room temperature. The primary mechanism for this warpage behavior was found to be thermal oxidation of the EMC in HTSL. High temperature causes thermo-oxidative crosslinking leading to densification and shrinkage of the EMC inducing stresses leading to package warpage. Oxidation also changes the coefficient of thermal expansion and elastic modulus of the EMC.


Archive | 2016

STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR DEVICES

Nishant Lakhera; James R. Guajardo; Varughese Mathew; Akhilesh K. Singh


Archive | 2018

Electronic component package with heatsink and multiple electronic components

Navas Khan Oratti Kalandar; Akhilesh K. Singh; Nishant Lakhera


Archive | 2017

WAFER LEVEL CHIP SCALE PACKAGE WITH ENCAPSULANT

Navas Khan Oratti Kalandar; Nishant Lakhera; Akhilesh K. Singh


Archive | 2017

METHOD FOR PACKAGING AN INTEGRATED CIRCUIT DEVICE WITH STRESS BUFFER

Navas Khan Oratti Kalandar; Nishant Lakhera; Akhilesh K. Singh


Archive | 2017

Apparatus and Methods for Multi-Die Packaging

Nishant Lakhera; Navas Khan Oratti Kalandar; Akhilesh K. Singh


International Symposium on Microelectronics | 2017

Adhesion Characteristics of Epoxy Molding Compound and Copper Leadframe Interface: Impact of Environmental Reliability Stresses

Nishant Lakhera; Sandeep Shantaram; A R Nazmus Sakib


International Symposium on Microelectronics | 2017

Investigation & Resolution of Current Leakage Failure caused by Carbon Black Aggregation in Mold Compound

Akhilesh K. Singh; Teck Beng Lau; Nishant Lakhera; Hoffmann James; Boon Yew Low


Archive | 2016

Die attachment for packaged semiconductor device

Akhilesh K. Singh; Rama I. Hegde; Nishant Lakhera


Archive | 2015

Apparatus and methods for stackable packaging

Navas Khan Oratti Kalandar; Nishant Lakhera; Varughese Mathew; Akhilesh K. Singh

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Boon Yew Low

Freescale Semiconductor

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