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Dive into the research topics where Nobuhiro Matsudaira is active.

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Featured researches published by Nobuhiro Matsudaira.


Journal of Lightwave Technology | 2000

64-Gb/s highly reliable network switch (RHiNET-2/SW) using parallel optical interconnection

Shinji Nishimura; Tomohiro Kudoh; Hiroaki Nishi; Junji Yamamoto; Katsuyoshi Harasawa; Nobuhiro Matsudaira; Shigeto Akutsu; Hideharu Amano

RHiNET-2/SW is a network switch that enables high-performance optical network based parallel computing system in a distributed environment. The switch used in such a computing system must provide high-speed, low-latency packet switching with high reliability. Our switch allows high-speed 8-Gb/s/port optical data transmission over a distance of up to 100 m, and the aggregate throughput is 64 Gb/s. In RHiNET-2/SW, eight pairs of 800-Mb/s/spl times/12-channel optical interconnection modules and a one-chip CMOS ASIC switch LSI (a 784-pin BGA package) are mounted on a single compact board. To enable high-performance parallel computing, this switch must provide high-speed, highly reliable node-to-node data transmission. To evaluate the reliability of the switch, we measured the bit error rate (BER) and skew between the data channels. The BER of the signal transmission through one I/O port was better than 10/sup -11/ at a data rate of 800 Mb/s /spl times/10 b with a large timing-budget margin (870 ps) and skew of less than 140 ps. This shows that RHiNET-2/SW can provide high-throughput, highly reliable optical data transmission between the nodes of a network-based parallel computing system.


New Generation Computing | 2000

RHINET-2/SW: A high-throughput, compact network-switch using 8.8-Gbit/s optical interconnection

Shinji Nishimura; Katsuyoshi Harasawa; Nobuhiro Matsudaira; Tomohiro Kudoh; Hiroaki Nishi

We have developed a high-throughput, compact network switch (the RHiNET-2/SW) for a distributed parallel computing system. Eight pairs of 800-Mbit/s×12-channel optical interconnection modules and a CMOS ASIC switch are integrated on a compact circuit board. To realize high-throughput (64 Gbit/s) and low-latency network, the SW-LSI has a customized high-speed LVDS I/O interface, and a high-speed internal SRAM memory in a 784-pin BGA one-chip package. We have also developed device implementation technologies to overcome the electrical problems (loss and crosstalk) caused by such high integration. The RHiNET-2/SW system enables high-performance parallel processing in a distributed computing environment.


2000 International Topical Meeting on Optics in Computing (OC2000) | 2000

High-throughput network switch for the RHiNET-2 optically interconnected parallel computing system

Shinji Nishimura; Tomohiro Kudoh; Hiroaki Nishi; Katsuyoshi Harasawa; Nobuhiro Matsudaira; Shigeto Akutsu; Koji Tasyo; Hideharu Amano

We have produced a prototype network-switch board (the RHiNET-2/SW) for optical interconnection. Eight pairs of 800-Mbit/s X 12-channel optical interconnection modules and a one-chip CMOS ASIC switch LSI (a 784-pin BGA package) are mounted on to a single board. This board allows 8- Gbit/s/port parallel optical data transmission over a distance of up to 100 m, and the aggregate throughput is 64 Gbit/s/board. All of the electrical interfaces are composed of CMOS-LVDS logic. We have evaluated the skew of the signal and the reliability of each optical port by measuring the BER. No errors were detected during the 1011-bit packet data transmission at a data rate of 880 Mbit/s X 10 bits (8.8 Gbit/s/port). (This corresponds to a BER of less than 10-11). The skew between data channels in one I/O port was less than 141 ps. The fiber length was 50 m. This test result shows that we achieved a high-throughput and long-transmission-length RHiNET-2/SW system using optical interconnection, and that the reliability of the I/O ports in the RHiNET-2/SW is sufficient for the RHiNET-2 parallel computing system.


asia communications and photonics conference and exhibition | 2009

10-Gb/s Burst-mode receiver for fast settling time

Daisuke Mashimo; Jun Sugawa; Hiroki Ikeda; Katsuya Minatozaki; Nobuhiro Matsudaira

We developed a 10-Gb/s burst-mode receiver for a fast receiver settling time. The receiver has an ATC boost function and a differential output stabilization circuit to realized a fast settling time. We achieved 50-ns receiver settling time.


Archive | 2001

High-frequency amplifier

Takayuki Tsutsui; Hiroyuki Nagamori; Kouichi Matsushita; Nobuhiro Matsudaira


Archive | 2001

High-frequency power amplifier, wireless communication apparatus and wireless communication system

Kouichi Matsushita; Tomio Furuya; Tetsuaki Adachi; Hitoshi Akamine; Nobuhiro Matsudaira


Archive | 2002

High frequency power amplification electronic component and wireless communication system

Hitoshi Akamine; Nobuhiro Matsudaira; Kyoichi Takahashi; 松平 信洋; 赤嶺 均; 高橋 恭一


PI '99 Proceedings of the The 6th International Conference on Parallel Interconnects | 1999

A Network Switch Using Optical Interconnection for High Performance Parallel Computing Using PCs

Shinji Nishimura; Tomohiro Kudoh; Hiroaki Nishi; Katsuyoshi Harasawa; Nobuhiro Matsudaira; Shigeto Akutsu; Koji Tasyo; Hideharu Amano


Archive | 2004

High-frequency power amplifying electric unit and radio communication system

Kyoichi Takahashi; Nobuhiro Matsudaira; Hitoshi Akamine


Archive | 2002

High frequency power amplifier circuit and wireless communication unit, and wireless communication system

Tetsuaki Adachi; Hitoshi Akamine; Tomio Furuya; Nobuhiro Matsudaira; Koichi Matsushita; 冨男 古屋; 徹朗 安達; 孔一 松下; 信洋 松平; 均 赤嶺

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Tomohiro Kudoh

National Institute of Advanced Industrial Science and Technology

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