Nobuo Aoi

A novel air gap integration scheme for multi-level interconnects using self-aligned via plugs

A novel multi-level interconnect process, realizing air gap structures composed of not new low k materials but conventional SiO/sub 2/ films, has been developed in order to drastically decrease the capacitance between lines. The effective relative dielectric constant of 1.8 is obtained. This process can solve the significant issues associated with air gap structure, such as the via failures due to misalignment between the line and via levels.

Suppressing oxidization of hydrogen silsesquioxane films by using H/sub 2/O plasma in ashing process

We have found that H/sub 2/O plasma is very effective in suppressing degradation of HSQ (hydrogen silsesquioxane) films when removing photoresist from their surfaces. H/sub 2/O plasma treatment causes little Si-H oxidization in HSQ films. Increases in the dielectric constant and leakage current of HSQ films treated by H/sub 2/O plasma is much smaller than those of films treated by O/sub 2/ plasma.

Integration of 3 level air gap interconnect for sub-quarter micron CMOS

A three-level interconnect structure using an air gap process has been successfully fabricated. The practical use of air gap interconnects has been proved by evaluating via chain yield and EM properties. The RC delay time is reduced by 38% as compared with that of Al-SiOF. The circuit performance has been found to be superior to those of other low-k interconnects, including Cu-SiOF. This air gap process is quite promising for sub-0.25 /spl mu/m CMOS technology.