Nokibul Islam

Feature extraction and damage-precursors for prognostication of lead-free electronics.

Damage pre-cursors based health management and prognostication methodology has been presented for electronic systems in harsh environments. The framework has been developed based on a development of correlation between damage pre-cursors and underlying degradation mechanisms in lead-free packaging architectures. The proposed methodology eliminates the need for knowledge of prior stress histories and enables interrogation of system state using the identified damage pre-cursors. Test vehicle includes various area-array packaging architectures subjected to single thermo-mechanical stresses including thermal cycling in the range of -40degC to 125degC and isothermal aging at 125degC. Experimental data on damage pre-cursors has been presented for packaging architectures encompassing flex-substrate ball grid arrays, chip-array ball grid arrays, and plastic ball grid arrays. Examples of damage proxies include, phase-growth parameter, intermetallic thickness and interfacial stress variations. Damage proxies have correlated with residual life. The damage proxies have also been correlated with computational finite-element model predictions. Plastic and creep strain energy densities have been correlated to the identified damage proxies

Interface failure in lead free solder joints

The phenomenon of interface failure in lead free solder joints was explored using solder joint array tensile testing. The effects of pad metallization, solder alloy, reflow conditions, and post reflow thermal aging were quantified. The joint strength ranged from 5 to 115MPa. The joint ductility dropped to zero in some cases. The interface microstructure and failure mode were characterized for each combination of factors. Most of the trends were linked to microstructural features of the interface. A ductile-to-brittle transition strain rate (DTBTSR) was defined as a metric to quantify the performance of a specific joint relative to interface failure. The DTBTSR ranged from 10-3 /sec to 10/sec for the conditions studied

Prognostication and health monitoring of leaded and lead free electronic and MEMS packages in harsh environments

In this paper, a methodology for prognostication-of-electronics has been developed for accurate assessment of residual life in a deployed electronic components, and determination of damage-state in absence of macro-indicators of failure. Proxies for leading indicators-of-failure have been identified and correlated with damage progression under thermo-mechanical loads. Examples of proxies include microstructural evolution characterized by average phase size and intermetallic growth rate in solder interconnects. Validity of damage proxies has been investigated for both 63Sn37Pb leaded and SnAgCu leadfree electronics. Structures examined include plastic ball grid array format electronic and MEMS packages and discrete devices assembled with FR4-06 laminates. Focus of the research presented in this paper is on interrogation of the aged materials damage state and enhancing the understanding of damage progression. The research is aimed at development of damage relationships for determination of residual life of aged electronics and assessment of design margins instead of life prediction of new components. The prognostic indicators presented in this paper, can be used for health monitoring of electronic assemblies.

Damage mechanics of electronics on metal-backed substrates in harsh environments

In this study, the effect of metal-backed boards on the interconnect reliability has been evaluated. Previous studies on electronic reliability for automotive environments have addressed the damage mechanics of solder joints in plastic ball-grid arrays on non-metal backed substrates (Lall et al., 2003, Syed et al., 1996, Evans et al., 1997, Mawer et al., 1999) and ceramic BGAs on non-metal backed substrates (Darveaux et al., 1992, 1995, 2000). Other failure mechanisms investigated include delamination of PCB from metal backing. Increased use of sensors and controls in automotive applications has resulted in significant emphasis on the deployment of electronics directly mounted on the engine and transmission. Increased shock, vibration, and higher temperatures necessitate the fundamental understanding of damage mechanisms which are active in these environments. Electronics typical of benign office environments uses FR-4 printed circuit boards. Automotive application typically use high glass-transition temperature laminates such as FR4-06 glass/epoxy laminate material (T/sub g/=164.9/spl deg/C). In application environments, metal-backing of printed circuits boards is being targeted for thermal dissipation, mechanical stability and interconnections reliability. The test vehicle is a metal backed FR4-06 laminate. The printed circuit board has an aluminum metal backing, attached with pressure sensitive adhesive (PSA). Component architectures tested include plastic ball grid array devices, C2BGA devices, QFN, and discrete resistors. Reliability of the component architectures has been evaluated for HASL. Crack propagation and intermetallic thickness data has been acquired as a function of cycle count. Reliability data has been acquired on all these architectures. Material constitutive behavior of PSA has been measured using uniaxial test samples. The measured constitutive behavior has been incorporated into non-linear finite element simulations. Predictive models have been developed for the dominant failure mechanisms for all the component architectures tested.

Model for BGA and CSP reliability in automotive underhood applications

Fine-pitch ball grid array (BGA) and underfills have been used in benign office environments and wireless applications for a number of years, however their reliability in automotive un- derhood environment is not well understood. In this work, the re- liability of fine-pitch plastic ball grid array (PBGA) packages has been evaluated in the automotive underhood environment. Exper- imental studies indicate that the coefficient of thermal expansion (CTE) as measured by thermomechanical analyzer (TMA) typi- cally starts to change at 10-15 C lower temperature than the specified by differential scanning calorimetry (DSC) potentially ex- tending the change in CTE well into the accelerated test envelope in the neighborhood of 125 C. High substrates with glass-tran- sition temperatures much higher than the 125 C high tempera- ture limit, are therefore not subject to the effect of high coefficient of thermal expansion close to the high temperature of the acceler- ated test. Darveauxs damage relationships (1)-(3) were derived on ceramic ball grid array (CBGA) assemblies, with predominantly solder mask defined (SMD) pads and 62Sn36Pb2Ag solder. In ad- dition to significant differences in the crack propagation paths for the two pad constructions, SMD pads fail significantly faster than the non solder mask defined (NSMD) pads in thermal fatigue. The thermal mismatch on CBGAs is much larger than PBGA assem- blies. Crack propagation in CBGAs is often observed predomi- nantly on the package side as opposed to both package and board side for PBGAs. In the present study, crack propagation data has been acquired on assemblies with 15, 17, and 23 mm size plastic BGAs with NSMD pads and 63Sn37Pb on high- printed cir- cuit boards. The data has been benchmarked against Darveauxs data on CBGA assemblies. Experimental matrix also encompasses the effect of bis-maleimide triazine (BT) substrate thickness on reliability. Damage constants have been developed and compared against existing Darveaux Constants. Prediction error has been quantified for both sets of constants. Index Terms—Ball grid array (BGA), bis-maleimide triazine (BT), ceramic ball grid array (CBGA), coefficient of thermal expansion (CTE), non solder mask defined (NSMD), plastic ball grid array (PBGA), thermomechanical analyzer (TMA).

Feature extraction and damage-precursors for prognostication of lead-free electronics

Damage pre-cursors based health management and prognostication methodology has been presented for electronic systems in harsh environments. The framework has been developed based on a development of correlation between damage pre-cursors and underlying degradation mechanisms in lead-free packaging architectures. The proposed methodology eliminates the need for knowledge of prior stress histories and enables interrogation of system state using the identified damage pre-cursors. Test vehicle includes various area-array packaging architectures subjected to single thermo-mechanical stresses including thermal cycling in the range of -40/spl deg/C to 125/spl deg/C and isothermal aging at 125/spl deg/C. Experimental data on damage pre-cursors has been presented for packaging architectures encompassing flex-substrate ball grid arrays, chip-array ball grid arrays, and plastic ball grid arrays. Examples of damage proxies include, phase-growth parameter, intermetallic thickness and interfacial stress variations. Damage proxies have correlated with residual life. The damage proxies have also been correlated with computational finite-element model predictions. Plastic and creep strain energy densities have been correlated to the identified damage proxies.

Study of FC M BGA with low CTE core substrate

Amkors FCMBGA, flip chip package based on transfer molding for high performance device was developed and introduced to industry in 2008[1,2]. During the molding process, bump deformation was not significant, and voids were not observed under flip chip die. Coplanarity with a low Coefficient of Thermal Expansion, CTE, substrate construction was similar to a single piece lidded package construction. Coplanarity at high temperature did not change significantly with low CTE substrate compared to standard substrates. The flip chip package with molding passed reliability test such as Moisture Resistance Testing, MRT, and Thermal Cycling, TC 1500 cycles. No delamination or cracks were observed.

Electromigration for advanced Cu interconnect and the challenges with reduced pitch bumps

Cu Column bump has seen growing adoption in both high-end and low-cost mobile devices as well as in consumer, computing and networking devices. Higher input/output (I/O) density and very fine pitch requirements are driving very small feature sizes such as small bump on a narrow pad or bump on lead (BOL), while higher performance requirements are driving increased current densities, thus making electromigration (EM) performance a real and serious concern. As the fine pitch and bump sizes decrease (in both mass reflow and thermo compression bonding processes) and the current density through the bump increases, EM reliability is becoming an alarming issue across the industry. High current density in Cu column bump combined with Joule heating may easily cause an early EM failure in field applications. Many researchers [1-3, 11-13] have published copper column EM data with a number of studies and EM variables, but no data has been published for robust BOL/bump design rules for high temperature and high current conditions which is indigent in high performance packages. This project has been initiated to resolve EM challenges in the industry by identifying the BOL/ bump design with regards to the temperature/current conditions so a robust design rule/process window can be established for next generation packages.

Optimization of Compression Bonding Processing Temperature for Fine Pitch Cu-Column Flip Chip Devices

For the demand of high density input/output (I/O), fine-pitch, and low-k materials in copper column bump flip chip packages, Thermal Compression Bonding (TCB) with pre-applied Non Conductive Paste (NCP) has been developed in order to ensure manufacturing reliability. The narrow bonding process window of pre-applied NCP, short bonding time, and high bonding head temperature can cause low yield issues such as NCP voiding in solder and no solder wetting on substrate. For this reason, the bonding parameters, such as bonding temperature profiles and dwell times, have to be controlled and optimized to achieve good solder wettability. In this paper, the optimized maximum bonding temperatures and timing of the TCB process for fine pitch copper column flip chip package are examined. A thermal simulation is also conducted to correlate with experimental data. In the experiment, the bump temperature is measured with a thermocouple while the bonding head temperature and time are controlled with a heat controller. In the thermal simulation, a transient approach is used to consider the bonding temperature profiles and boundary conditions. The paper concludes with an approach and methodology to obtain optimized bonding temperature profiles which is crucial for the development of next generation fine pitch flip chip devices.

Methodologies for Prognostication and Health Monitoring of Leaded and Lead Free Electronics and MEMS Packages in Harsh Environments

In this paper, a methodology for prognostication-of-electronics has been developed for accurate assessment of residual life in a deployed electronic components, and determination of damage-state in absence of macro-indicators of failure. Proxies for leading indicators-of-failure have been identified and correlated with damage progression under thermo-mechanical loads. Examples of proxies include — micro-structural evolution characterized by average phase size and intermetallic growth rate in solder interconnects. Validity of damage proxies has been investigated for both 63Sn37Pb leaded and SnAgCu leadfree electronics. Structures examined include — plastic ball grid array format electronic and MEMS Packages and discrete devices assembled with FR4-06 laminates. Focus of the research presented in this paper is on interrogation of the aged material’s damage state and enhancing the understanding of damage progression. The research is aimed at development of damage relationships for determination of residual life of aged electronics and assessment of design margins instead of life prediction of new components. The prognostic indicators presented in this paper, can be used for health monitoring of electronic assemblies.Copyright