Noriaki Maeda

Low-power embedded SRAM modules with expanded margins for writing

A low-power embedded SRAM module implements a writing margin expansion for low-voltage operation, a write replica circuit for low-power operation and a low-leakage structure. The replica circuit reduces active power by 18%, and a 512kB module operates at 450MHz, has 7.8 /spl mu/A leakage in standby, and a minimum V/sub DD/ of 0.8V.

65nm Low-Power High-Density SRAM Operable at 1.0V under 3σ Systematic Variation Using Separate V th Monitoring and Body Bias for NMOS and PMOS

We design a technique to separately measure the Vth of NMOS and PMOS. This technique is used to determine the body bias of NMOS and PMOS individually. Prototype chips with 1Mb 0.51 mm2 high-density SRAM cells using a 65 nm low-power process are fabricated and achieve 1.0 V operation, even when considering actual Vth variation.

A 40-nm low-power SRAM with multi-stage replica-bitline technique for reducing timing variation

A multi-stage replica bitline technique for reducing access time by suppressing enable timing variation of a sense amplifier was developed. Applied to a 288-kbit SRAM of the 40-nm process node, this technique achieves 6.1% access time reduction by reducing the sense-amplifier timing variation by 43%.

A 0.41µA standby leakage 32Kb embedded SRAM with Low-Voltage resume-standby utilizing all digital current comparator in 28nm HKMG CMOS

A high-performance and low-leakage current embedded SRAM for mobile phones is proposed. The proposed SRAM has a low-voltage resume-standby mode to reduce the standby leakage. An all digital current comparator is also proposed to choose a suitable standby mode. A test chip was fabricated using 28 nm HKMG CMOS technology. The proposed 32 Kb SRAM achives 0.41 μA standby leakage which is half of the conventional value, with 420 ps access.

Power-Management Features of R-Mobile U2, an Integrated Application Processor and Baseband Processor

R-mobile U2 integrates an application processor and an LTE-capable triple-band baseband processor in 28-nm technology to provide rich content to the mid-range market. Several power-management techniques are equipped, including a low-leakage power switch, dual-standby mode static RAM (SRAM), and frequency control for maximum power suppression.