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Dive into the research topics where Nozomu Takano is active.

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Featured researches published by Nozomu Takano.


Circuit World | 2001

New halogen‐free materials for PWB, HDI and advanced package substrate

Hikari Murai; Yoshiyuki Takeda; Nozomu Takano; Ken Ikeda

Recently, the requirement of the printed wiring boards (PWBs) of environmental harmony type has risen rapidly. We have developed the core technologies of halogen‐free. They consist of resin system technology and high filler content technology. The point of the resin technology is the development of a new resin system (RO resin) which takes nitrogen into the molecule frame in a large quantity. The point of the high filler content technology is the development of a new filler interphase control system (FICS) which enables the high dispersion of fillers. A variety of halogen‐free substrates which can be applied to the diversified needs have been developed by combining these technologies. They are MCL‐RO‐67G, thin laminate for the multi‐layer PWBs, MCF‐4000G, build‐up material for high density interconnect (HDI) , and MCL‐E‐679F(G), high Tg laminate for the advanced plastic IC packages (PKGs) and PWBs. These materials have excellent heat‐resistance, and are suitable for lead‐free solder as well. The robustnes...


electronic components and technology conference | 2016

Large Panel Level Fan Out Package Built up Study with Film Type Encapsulation Material

Hiroshi Takahashi; Hirokazu Noma; Naoya Suzuki; Yutaka Nomura; Aya Kasahara; Nozomu Takano; Toshihisa Nonaka

Die first and face up type FO-PLP preparation was studied referring the organic substrate fabrication process. 660 mm x 515 mm size carrier was used and 640 mm x 495 mm area was encapsulated with the film molding material comparing with granule material. 3 mm x 3mm to 10 mm x 10 mm dies were mounted on the panel using temporary adhesive. Die shift at compression molding was evaluated in each die size. Larger die showed smaller die shift distance. The affection of the carrier CTE to the die shift was also investigated. The board which had CTEs of 6, 8, and 14 ppm/K were used. CTE of 14 ppm/K material showed the minimum di shift. Tracking of the warpage during the preparation process by each process step indicated that each material selection can control the warpage. Wiring layer was fabricated on the die molded panel which had the size of 510 mm x 407 mm. Laminate type insulation material was used. Filled via of 35 micron diameter and L/S = 15 / 15 micron was formed by 355 nm laser drilling and SAP.


electronic components and technology conference | 2010

NCF for wafer lamination process in higher density electronic packages

Kazutaka Honda; Tetsuya Enomoto; Akira Nagai; Nozomu Takano

We have developed a novel NCF (Non Conductive Film) which can be applied to the wafer lamination process and shows the excellent bondability & reliability. For lamination processability, we improved the transparency of NCF in order to recognize the dicing pattern or alignment marks on wafer through NCF. As a result, NCF-laminated wafer can be diced simultaneously and smoothly. For the bondability, the use of the high heat-resistant components and the optimization of the hardenability and viscosity made it possible to form the excellent bonding part and fill the narrow gap between chip & substrate without voids even at the high temperature condition (>300 degC for 1s) of Au-Sn eutectic bonding. For the reliability, we found that a kind of antioxidant prevented remarkably the electrochemical migration at finer pitch wiring and we confirmed the good electronic insulation property up to 25 μm pitch. Furthermore, the addition of the flux component into NCF enabled Cu-solder bonding. From these features, this NCF is expected to be a promising material for the high density electronic packages including 3D package with TSV (Through Silicon Via) [1–3].


Journal of Electronic Materials | 2014

Self-assembly of Sn-3Ag-0.5Cu Solder in Thermoplastic Resin Containing Carboxyl Group and its Interconnection

Kazuhiro Miyauchi; Yukihiko Yamashita; Naoya Suzuki; Nozomu Takano

The self-assembly of solder powder on pads is attractive as a novel interconnection method between chips and substrates. However, the solder used in this method is limited to Sn-58Bi and Sn-52In. In contrast, Sn-3Ag-0.5Cu has been relatively less studied despite its wide use as a lead-free solder in assembling semiconductor packages. Hence, here, polymeric materials incorporating Sn-3Ag-0.5Cu solder powder were investigated for the self-assembly of the solder on pads at temperatures up to 260°C in a lead-free reflow process. The self-assembly of the solder was observed with an optical microscope through transparent glass chips placed on substrates covered with the polymeric materials incorporating the solder powder. Differential scanning calorimetry measurements were performed to confirm the behaviors of the reaction of the resins and the melting of the solder. When epoxy resin with a fluxing additive was used as a matrix, self-assembly of the solder was prevented by the cross-linking reaction. Conversely, when thermoplastic resin containing carboxyl groups was used as a matrix, the self-assembly of solder was successfully achieved in the absence of fluxing additives. The shear strength of interconnection using reflowfilm with lamination was sufficient and significantly increased during the reflow process. However, the shear strength of the reflowfilm showed cohesive failure, possibly because of the brittle intermetallic compounds (Ag3Sn, Au4Sn) network in bulk was lower than that of conventional solder paste that showed interfacial failure after the reflow process with a rapid cooling rate.


2nd International IEEE Conference on Polymers and Adhesives in Microelectronics and Photonics. POLYTRONIC 2002. Conference Proceedings (Cat. No.02EX599) | 2002

Low-transmission-loss modified cyanate ester materials for high-frequency applications

Daisuke Fujimoto; Yasuyuki Mizuno; Nozomu Takano; Shigeo Sase; Harumi Negishi; Takeshi Sugimura

Cyanate esters cure through cyclotrimerization of reactive cyanate functional groups into resins with three-dimensional and densely cross-linked structures. i.e. triazine resins, which have low dielectric constants and high glass transition temperatures. Aryl cyanate esters had been of great interest as materials for low-dielectric-constant circuit boards; however, their dielectric properties could not satisfy the demands for high-speed communication. We have found that novel modified cyanate ester resins will show much lower dielectric constant/loss and better compatibility with high molecular weight thermoplastic polymers. Judging from the structure/property relationships obtained through the analytical results of their chemical structures and the studies on their visco-elastic properties, we have concluded that the above characteristics were due to the unique resin structures. We developed semi-intermolecular-penetrating network (semi-IPN) materials by combining modified cyanate ester resins with thermoplastic polymers which provide low dissipation factor in GHz frequency range. Circuit boards with glass cloths and these materials demonstrated low transmission losses in the frequency range up to 30 GHz. These excellent microwave properties will ensure an advantage to the novel modified cyanate ester resins as materials for circuit boards in high-speed communications technology.


Archive | 2006

Multi-layer wiring board

Kazumasa Takeuchi; Nozomu Takano; Masaki Yamaguchi; Makoto Yanagida


Archive | 2002

Thermosetting resin composition and use thereof

Shinji Tsuchikawa; Kazuhito Kobayashi; Yasuyuki Mizuno; Daisuke Fujimoto; Nozomu Takano


Archive | 1996

Prepreg for printed wiring boards, resin varnish, resin composition and laminate for printed wiring boards produced by using these substances

Nozomu Takano; Shigeo Sase; Tomio Fukuda; Michitoshi Arata


Archive | 2001

Resin composition with excellent dielectric characteristics, process for producing resin composition, varnish prepared from the same, process for producing the same, prepeg made with these, and metal-clad laminate

Yasuyuki Mizuno; Daisuke Fujimoto; Kenichi Tomioka; Nozomu Takano


Archive | 2000

Prepreg, metal-clad laminate, and printed circuit board obtained from these

Nozomu Takano; Tomio Fukuda; Masato Miyatake; Masahisa Ose

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