Oleksandr Drozd

Effectiveness of matrix and pipeline FPGA-based arithmetic components of safety-related systems

The paper is devoted to design of the digital components for safety-related instrumentation and control systems using the modern CAD tools. Traditionally, the digital components are built with matrix parallelism that reduces fault tolerance of circuits and safety of systems in their checkability. Circuits with bitwise pipeline data processing have advantage in checkability, but are considered as less efficient. Matrix and pipeline methods for multiplying the numbers are compared with respect to the ratio of throughput to complexity. To estimate the relative effectiveness of these methods the resource approach is applied. The obtained estimations are verified experimentally using the multipliers realized on FPGA. Qualitatively, the expected and experimental estimations are consistent, and the reasons of their quantitative deviations are analyzed1.

Hidden faults in FPGA-built digital components of safety-related systems

This paper is devoted to a problem of the hidden faults, which can be accumulated in digital components of safety-related systems during a long term normal mode and reduce fault tolerance of circuits and safety of system in the most responsible emergency mode. This problem connected with low checkability of array structures traditionally used in digital components of safety-related systems. The problem of the hidden faults can be solved in case of digital component implementation on base of bitwise pipelines. They process data in the series codes which do not leave the place for the hidden faults. Whether bitwise pipelines can compete with array structures in throughput and energy consumption? The comparative analysis in throughput and energy consumption of pipeline and array structures on the example of the bitwise pipeline and iterative array multipliers implemented in FPGA by CAD of Altera is offered. Faults of the general signals, such as synchronization violation, can also show the hidden behavior which is not always detected in processing of serial codes. Monitoring of the general signals of the digital circuit on the basis of the analysis of its power consumption is offered. The comparative analysis of bitwise pipeline and iterative array multipliers on FPGA in suitability to monitoring of the general signals on the basis of the assessment of power consumption is carried out.

Evolutionary network model of testing of the distributed information systems

The Automated Systems of Technical Diagnostics (ASTD) of the dynamic distributed information systems (DIS) need the operational reconfiguration corresponding to changes of DIS. As a result, support of ASTD also requires the up-dating, advancing changes of DIS. In this work, development of the network model of testing is provided, allowing to reduce time of synthesis of tests for DIS. The Model is based on the evolutionary organization of testing for a network of automata. The model assumes creation of component test evolutions in interaction with evolutions of realisation and transportation on an automata network in case of repeated use of nodal behavior. The conditions of realysability and transportability are defined for automata tests in a network model of testing in addition to a set of evolutionary component models of testing. Models are provided at the first level of component model of testing for the separated component automata of a network, at the second level of cooperative model of testing for the component automata in a networked environment of the realyzing and transporting subnets, ay the third level of a network model of testing on the basis of combination of cooperative models of testing of the second level. The evolutionary network model of testing allows to define conditions of synthesis of network behavioral tests for DIS and to decompose of the task of synthesis of tests for DIS with reduction of its complexity. The evolutionary search of this synthesis allows to reduce expenses of time and resources in comparison with the determined approach in most cases real systems.