Olivier Venard

On the system level convergence of ILA and DLA for digital predistortion

In this paper, we present the results for system level convergence of indirect learning architecture (ILA) and direct learning architecture (DLA) for digital predistortion. We show that best performance with ILA and DLA can only be obtained if the system level identification of the power amplifier and predistorter is done iteratively. Results are demonstrated in terms of improvement in adjacent channel power ratio (ACPR) and error vector magnitude (EVM) at the output of power amplifier (PA) with each system level iteration for both the architectures when a Long Term Evolution-Advanced (LTE-Advanced) signal is applied at the input. We also show that predistorter identification with DLA is more robust compared to ILA in presence of additive white Gaussian noise (AWGN).

Digital predistortion for RF power amplifiers: State of the art and advanced approaches

Digital predistortion (DPD) is one of the most promising techniques for the linearization of power amplifiers. In this overview paper, some of the most important aspects related to this technique are briefly covered. State of the art on the DPD techniques, the associated signal processing algorithms and crest-factor reduction techniques is presented.

Two-dimensional memory selective polynomial model for digital predistortion

In this paper, we propose a Two-Dimensional Memory Selective Polynomial (2-D MSP) model for digital predistortion (DPD). The proposed model has been demonstrated to achieve a comparable performance to the well known traditional predistorter models such as generalized memory polynomial (GMP) but with significantly less number of parameters. The proposed model has been validated by evaluating the DPD performance on a class AB power amplifier in terms of adjacent channel power ratio (ACPR).

Subband digital predistorsion based on Indirect Learning Architecture

This paper deals with the linearization of RF power amplifiers (PAs) using digital predistortion (DPD) technique. One of the most important constraint on DPD implementation is digitization of PA output signal needed for identification of predistorter model. The bandwidth of this signal may be 3 to 7 times wider than the bandwidth of the input signal. The sampling rate required for accurate compensation of out-of-band distortions is thus very high, and has a direct impact on power consumption and implementation complexity of DPD identification algorithms on digital processor. In this paper, we propose a new iterative DPD identification algorithm based on the Indirect Learning Architecture (ILA) and on subband decomposition of PA output signal. The proposed algorithm converges to conventional ILA solution with a drastic decrease in required sampling rate.

Identification of low order cascaded digital predistortion with different-structure stages for linearization of power amplifiers

This paper studies the linearization of a high nonlinear power amplifier (PA) using low order cascaded Digital predistortion (DPD). A 2-stage memory polynomial (MP) model DPD structure is analyzed with different identification methods. The identification order strongly influences the performance of DPD and the stage with the higher order of nonlinearity should be identified first. The linearization performances of the identified DPDs are evaluated on a Doherty power amplifier with a Long Term Evolution-Advanced (LTE) signal.

Comparison of hill-climbing and genetic algorithms for digital predistortion models sizing

Generalized Memory Polynomial (GMP) models are widely used for the linearization of power amplifiers. They offer a good tradeoff between linearization performance and implementation complexity. Their structure is defined by 8 integer parameters representing different non-linearity orders and memory lengths. These 8 degrees of freedom allow achieving very good linearization performance with a small number of coefficients. But the optimal sizing (determination of the 8 parameters) of such models could require huge computation, for instance, if these 8 parameters are bounded between 1 and 10, there are 108 models to test using an exhaustive search, which is very computationally heavy and time consuming. Therefore optimization algorithms are needed to search for a GMP model structure which provides a good tradeoff between modeling accuracy and complexity. In this paper, we compare two heuristic optimization algorithms, hill-climbing and integer genetic algorithms, in terms of convergence speed, and optimality of the obtained solution regarding the defined criterion. They are evaluated using data measurements from an LDMOS Doherty Power Amplifier dedicated to base stations. The results show that both algorithms allow decreasing very significantly the searching time while giving optimal or close to optimal solutions. Compared with hill-climbing, the genetic approach leads to a more difficult control and interpretation of the path followed by the search algorithm since it is based on random operations (crossovers and mutations).

Impact of subband quantization on DPD correction performance

The digital predistortion (DPD) is a technique to linearize the response of power amplifiers which is the subject of an active research. In order to model accurately and properly linearize the PA, the ADC in the feedback path must digitize the distorted signal with an adequate resolution and bandwidth. The multi-stage noise band cancellation (MSNBC) ΣΔ architecture is able to provide a signal digitized by subbands and where the subbands may be digitized with different resolutions. We show that the correction performance can be maintained while different quantization for the main high power subband and for the low power subbands are used resulting in a more flexible and low power consumming solution.