Ondrej Subrt

A Contribution to Advanced Extraction Methods for Static ADC Non-linearity

One of the recent approaches for A/D converter performance extraction is the so-called Servo-Loop method. In this paper, we build an improved version of this method targeted to full transistor-level circuit simulation of static integral and differential non-linearity. In comparison with the conventional implementation, the Servo-Loop version proposed was enhanced by a powerful search algorithm. Subsequently, this paper deals with the description of a versatile Servo-Looper tool developed in Verilog-A language suitable for direct co-operation with most of the analog and mixed-signal simulators used in industry. Powerful capabilities of the proposed Servo-Looper tool were successfully confirmed by a large simulation set performed on a full custom ADC design example. The presented paper brings the most significant results of the ADC simulation procedure.

Developing Automated Design Procedure for Operational Amplifier blocks

This paper deals with the development of automated design procedure (ADP) of analog building blocks dedicated for full-custom integrated circuit design of an operational amplifier (OpAmp). The design procedure proposed is divided into consecutive steps starting from the technology and model card choice followed by the selection of basic blocks for the OpAmp design. Subsequently, the established OpAmp architecture enters an advanced optimization aided by differential evolutionary algorithms. As a result, a robust set of circuit parameters attached to the OpAmp design is obtained, respecting the multi-criterion requirements for analog performance.

Design aspects of the SC circuits and analysis of the cross-coupled charge pump

This paper presents some real properties of the cross-coupled charge pump that is used in low-power microelectronic integrated systems operating with high voltage (FLASH, EEPROM memories). SC-circuits characterization and design aspects are firstly discussed. Theoretical analysis of the cross-coupled charge pump with accompanying equations has been done. Some real properties have been simulated by ELDO Spice and compared with these assumptions. Simulation results show discrepancy between calculation and simulated parameters due to significant pumping losses that have been discussed in detail. Discontinuity of the output voltage through input parameters is very important finding that complicates the development of the real model for design purposes.

Description of the functional blocks for the cross-coupled charge pump design algorithm

This paper presents the circuit model that is used for the cross-coupled charge pump design algorithm. Symbolic description of the pump stage model as an analog functional block for high-voltage application is firstly discussed. Design process has been done by using simplified BSIM model equations assuming the long channel MOSFET. Characteristics have been verified by ELDO Spice and compared with the found relationships. Static and dynamic parameters of the subcircuit have been tested in two-stages structure by LT Spice simulator. Analysis results show the consistency between model and real circuits characteristics under given conditions. Complex model provides the reliable results for significantly smaller strange capacitances in comparision with the main pump capacitances. The model can be used for design and prediction of the pump parameters without long-time simulation process. The strong inversion region of MOSFET is expected, thus equations are correct for other MOSFET models that are used in chip design (PSP).

Versatile engine for virtual testing of ADC/DAC non-linearities

In this paper, we propose a novel versatile engine for behavioral or transistor-level design verification of data converters. This tool is dedicated to IC designers to verify static performance of the converters during their design. It is based on advanced Servo-Loop method presented in [1] and extended by features such as innovative DAC testing method (connecting ADC and DAC testing into one versatile engine). The environment proposed supports various converter resolutions and several types of digital coding. Powerful capabilities of the proposed engine were successfully confirmed by a large set of behavioral and transistor-level simulations in Spectre.

A Virtual A/D Converter Testbench for Educational Purpose — Development and Results

A Virtual A/D Converter Testbench for Educational Purpose — Development and Results This paper deals with a new concept of virtual testing engine for analogue-to-digital converters (ADCs). The whole system consists of program procedures to extract the most important ADC errors expressed in terms of integral and differential non-linearity (INL and DNL). The developed testbench is especially suitable for educational purpose because of modular conception of the system. The proposed testing engine is implemented in Maple™, bringing an ideal possibility to make a complex system for the simulations of ADC at the virtual level as well as at the circuit level. The system is a part of a complex environment using the Servo-loop and the Histogram method, combining their features so as to obtain high level of versatility. However, in this paper we concentrate only on the results from the Servo-loop method. The Servo-loop solution proposed here employs an effective search algorithm and improves convergence properties resulting in a significant reduction of the simulation time.

Developing Virtual ADC Testing Environment in MAPLE

This paper proposes an innovative concept of a virtual testing environment for analog-to-digital converters (ADCs) applying a suitable conjunction of two performance extraction algorithms -the Servo-Loop and Histogram method. The testing engine proposed is implemented in MAPLE and consists of program procedures to extract ADC errors expressed in term of integral and differential non-linearity (INL and DNL). The novelty of our solution is the use of effective search algorithm and improved convergence properties resulting in a significant reduction of the simulation time. Another advantage of the proposed approach is the fact that the implementation in MAPLE creates an ideal opportunity to build a complex environment comprising the virtual testing engine as well as circuit-level ADC models. Simulation results are shown, demonstrating the output of the ADC testing procedures using both the Servo-Loop and Histogram method.