Orhan Akbulut

Truncated graycoded bit-plane matching based motion estimation and its hardware architecture

This paper proposes an efficient low bit-depth representation based motion estimation approach which is particularly suitable for low-power consumer electronics devices. In the proposed approach motion estimation is carried out using bit truncated gray-coded image pixels. The corresponding hardware architecture is also designed and presented in this paper to show the effectiveness of the proposed approach. It is shown that the proposed approach provides improved motion estimation accuracy compared to conventional bit-truncation based approaches that are directly applied to binary coded pixel values. The proposed approach uses simple Gray-coding, that has very low-complexity and can be applied on a pixel-by-pixel basis. Hence, the comparatively more complex transformation processes required in one bit-transform or two-bit transform based low bit-depth representation ME approaches are avoided. Experimental results show that the proposed approach also outperforms such low bit-depth representation based motion estimation methods previously presented in the literature, in terms of motion estimation accuracy.

An all binary sub-pixel motion estimation approach and its hardware architecture

Motion estimation (ME) is the most computationally intensive part of a video coding system. Therefore it is very important to reduce its computational complexity. In this paper, a novel all-binary approach for reducing the computational complexity of sub-pixel accurate ME is proposed. An efficient hardware architecture for the proposed all-binary sub-pixel accurate motion estimation approach is also presented. The proposed hardware architecture has significantly low hardware complexity and therefore very low power consumption. It can process 720p video frames at 30 fps in a pipelined fashion together with the integer ME hardware. Therefore, it can be used in real-time low power video coding systems required by many mobile consumer electronics devices.

Truncated gray-coded bit-plane matching based motion estimation and its hardware architecture

In this paper, an efficient low bit-depth representation based motion estimation approach which is particularly suitable for low-power mobile devices is proposed. Motion estimation is carried out using bit truncated gray-coded image pixels in the proposed approach. The hardware architecture of the proposed motion estimation method is also designed to show the effectiveness of the proposed approach. It is shown that the proposed approach provides improved motion estimation accuracy compared to the other bit-truncation based approaches. The proposed hardware architecture has low hardware complexity and consumes very low power compared to the 8-bits/pixel based hardware architectures thus, it can be easily integrated to the state of the art video encoders.

One-dimensional processing for efficient optimal post-process/in-loop filtering in video coding

In this paper, efficient optimal post-process/inloop filtering in video coding is presented by applying two separate one-dimensional filters to significantly decrease the computational load of the optimal filtering process at the expense of only a slight quality loss. Furthermore, the compression of filter coefficients is evaluated using a Golomb-Rice (GR) coding approach together with differential encoding. Experimental results show that the proposed one dimensional processing approach reduces the computational complexity by at least 4 times compared to the formerly proposed two-dimensional optimal filtering case and enables real-time implementation. It is furthermore shown that, the filter coefficients can be compressed by up to 40% if GR coding is used together with differential encoding.

Fast sub-pixel motion estimation by means of one-bit transform

In this study sub-pixel motion estimation using one-bit transform is presented. The utilization of low bit depth representations for full-pixel motion estimation exist in the literature [1,7]. However sub-pixel motion estimation employing these kinds of transforms has not been tried until now. In this paper, it is shown that one-bit transform can also be utilized for sub-pixel motion estimation, significantly improving motion estimation accuracy. Hence a fast sub-pixel motion estimation approach is facilitated using one-bit transform.

Improved Block Motion Estimation Using Block Frequency Warping

In this letter, an enhanced motion estimation scheme based on block frequency warping is presented. In the proposed approach, the best candidate block is initially obtained using the classical full search scheme, and then frequency warping is applied to this block to improve the matching accuracy. The proposed method outperforms the conventional matching strategy, as shown in the experimental results.

Circle detection and analysis on furniture parts

In this work, detection and quality check of circles for furniture quality control system is carried out using a computer vision system. For the detection of circles, an integro-differential approach that is used as circular edge detecting operator, has been utilized. The radius and center of circles have been detected robustly. Not only is the performance of the proposed method high but also is the computational load fairly low.

Fast Sub-Pixel Motion Estimation Via One-Bit Transform

In this study sub-pixel motion estimation via one-bit transform is proposed. Low-bit resolution representations exist in literature for motion estimation. However sub-pixel motion estimation employing these kinds of transforms has not tried until now. One-bit (1BT) transform based motion estimation can give inaccurate result for block size of 8times8. Half and quarter pixel motion vectors can be calculated using one-bit transform. In this work higher performance is achieved computing half and quarter pixel motion vectors utilizing one-bit transform than pure one-bit motion estimation

Multi band pass filter based one-bit transforms in motion estimation

One-bit transform method can be used for low computational complexity block based motion estimation with respect to hardware implementation in video coding systems. The principal of the one-bit transform method is based on kernel which has multi band pass filtering. In this work, the performance of the one-bit transform methods obtained with band pass filtering on the state of the art video coding standard has been evaluated. Also new kernels, which have different multi band pass filtering, have been proposed to compare the performance of the low bit representation based motion estimation in low and high resolution videos.

Implementation of 1 -bit transform based motion estimation to HEVC encoder

In this work, one-bit transform (1BT) based motion estimation method is applied to HEVC encoder which is the most recent video coding standard. The most significant portion of the computational load of the HEVC originates from the motion estimation. Thus, many approaches are presented in literature in order to reduce this computational load. 1BT based ME approach denotes input image frames in low-bit depth form so that it is not only suitable for hardware implementation but also reduces computational load of whole process since it uses EX-OR based matching criterion. In this work, 1BT based ME is integrated into HEVC encoder and its performance is assessed. Experimental results show that the 1BT based ME approach has a neglectable performance loss compared conventional HEVC motion estimation approach.