Oscal T.-C. Chen

Minimization of switching activities of partial products for designing low-power multipliers

This work presents low-power 2s complement multipliers by minimizing the switching activities of partial products using the radix-4 Booth algorithm. Before computation for two input data, the one with a smaller effective dynamic range is processed to generate Booth codes, thereby increasing the probability that the partial products become zero. By employing the dynamic-range determination unit to control input data paths, the multiplier with a column-based adder tree of compressors or counters is designed. To further reduce power consumption, the two multipliers based on row-based and hybrid-based adder trees are realized with operations on effective dynamic ranges of input data. Functional blocks of these two multipliers can preserve their previous input states for noneffective dynamic data ranges and thus, reduce the number of their switching operations. To illustrate the proposed multipliers exhibiting low-power dissipation, the theoretical analyzes of switching activities of partial products are derived. The proposed 16 /spl times/ 16-bit multiplier with the column-based adder tree conserves more than 31.2%, 19.1%, and 33.0% of power consumed by the conventional multiplier, in applications of the ADPCM audio, G.723.1 speech, and wavelet-based image coders, respectively. Furthermore, the proposed multipliers with row-based, hybrid-based adder trees reduce power consumption by over 35.3%, 25.3% and 39.6%, and 33.4%, 24.9% and 36.9%, respectively. When considering product factors of hardware areas, critical delays and power consumption, the proposed multipliers can outperform the conventional multipliers. Consequently, the multipliers proposed herein can be broadly used in various media processing to yield low-power consumption at limited hardware cost or little slowing of speed.

Motion estimation using a one-dimensional gradient descent search

This work presents a low-complexity high-performance motion estimation method using a one-dimensional (1-D) gradient descent search. The proposed method consists of initial-point determination, initial-direction determination, a gradient descent search using variable step sizes and conjugate directions, and convergence checking. For each block, one of the original and predictive points with the best block-matching performance is the initial point where the predictive ones are motion vectors of its neighboring four searched blocks. In addition, the searching path is optimized by determining the initial direction based on the vector from the original point to the initial point. After determining the initial point and direction, the gradient descent search using variable step sizes and conjugate directions is performed until the searched point attains a better performance than its neighboring points. Moreover, variable step sizes for moving and slowly moving, or stationary blocks, are well addressed to improve the convergence performance of a gradient descent search. Simulation results demonstrate that our method yields a superior performance in terms of computational complexity and picture quality as compared to the three-step search, 1-D full search, block-based gradient descent search, and one-at-a-time search methods.

Content-Dependent Watermarking Scheme in Compressed Speech With Identifying Manner and Location of Attacks

As speech compression technologies have advanced, digital recording devices have become increasingly popular. However, data formats used in popular speech codecs are known a priori, such that compressed data can be modified easily via insertion, deletion, and replacement. This work proposes a content-dependent watermarking scheme suitable for codebook-excited linear prediction (CELP)-based speech codec that ensures the integrity of compressed speech data. Speech data are initially partitioned into many groups, each of which includes multiple speech frames. The watermark embedded in each frame is then generated according to the line spectrum frequency (LSF) feature in the current frame, the pitch extracted from the succeeding frame, the watermark embedded in the preceding frame, and the group index which is determined by the location of the current frame. Finally, some of the least significant bits (LSBs) of the indices indicating the excitation pulse positions or excitation vectors are substituted for the watermark. Conventional watermarking schemes can only detect whether compressed speech data are intact. They cannot determine where compressed speech data are altered by insertion, deletion, or replacement, whereas the proposed scheme can. Experiments established that the proposed scheme used in the G.723.1 6.3 kb/s speech codecs embeds 12 bits in each compressed speech frame with 189 bits, and only decreases the perceptual evaluation of speech quality (PESQ) by 0.11. Additionally, its accuracy in detecting the locations of attacked frames is very high, with only two normal frames mistaken as attacked frames. Therefore, the proposed watermarking scheme effectively ensures the integrity of compressed speech data.

A low-power adder operating on effective dynamic data ranges

To design a power-efficient digital signal processor, this study develops a fundamental arithmetic unit of a low-power adder that operates on effective dynamic data ranges. Before performing an addition operation, the effective dynamic ranges of two input data are determined. Based on a larger effective dynamic range, only selected functional blocks of the adder are activated to generate the desired result while the input bits of the unused functional blocks remain in their previous states. The added result is then recovered to match the required word length. Using this approach to reduce switching operations of noneffective bits allows input data in 2s complement and sign magnitude representations to have similar switching activities. This investigation thus proposes a 2s complement adder with two master-stage and slave-stage flip-flops, a dynamic-range determination unit and a sign-extension unit, owing to the easy implementation of addition and subtraction in such a system. Furthermore, this adder has a minimum number of transistors addressed by carry-in bits and thus is designed to reduce the power consumption of its unused functional blocks. The dynamic range and sign-extension units are explored in detail to minimize their circuit area and power consumption. Experimental results demonstrate that the proposed 32-bit adder can reduce power dissipation of conventional low-power adders for practical multimedia applications. Besides the ripple adder, the proposed approach can be utilized in other adder cells, such as carry lookahead and carry-select adders, to compromise complexity, speed and power consumption for application-specific integrated circuits and digital signal processors.

Low-power multipliers by minimizing switching activities of partial products

Low-power 2s complement multipliers are developed through minimizing switching activities of partial products using the radix-4 Booth algorithm. Before computation, the input datum with the: smaller effective dynamic range is processed to generate Booth codes, thereby increasing probabilities of partial products being zero. By employing the dynamic-range determination units to control input data paths, the proposed 16/spl times/16-bit multipliers based on the Yu, Goldovsky, and Mahant-Shettis low-power approaches are individually implemented. To illustrate the proposed multiplier having low-power dissipation, the theoretical analyses of switching activities of partial products are derived. Compared to the power consumed by the conventional multipliers, in applications of the G723.1 speech, ADPCM audio and wavelet-based image coders, the proposed multipliers conserve more than 14%, 30% and 31% of power, respectively. Therefore, the multipliers proposed herein can be widely used for various media processing to achieve low-power consumption at fair hardware costs.

Image segmentation method using thresholds automatically determined from picture contents

Image segmentation has become an indispensable task in many image and video applications. This work develops an image segmentation method based on the modified edge-following scheme where different thresholds are automatically determined according to areas with varied contents in a picture, thus yielding suitable segmentation results in different areas. First, the iterative threshold selection technique is modified to calculate the initial-point threshold of the whole image or a particular block. Second, the quad-tree decomposition that starts from the whole image employs gray-level gradient characteristics of the currently-processed block to decide further decomposition or not. After the quad-tree decomposition, the initial-point threshold in each decomposed block is adopted to determine initial points. Additionally, the contour threshold is determined based on the histogram of gradients in each decomposed block. Particularly, contour thresholds could eliminate inappropriate contours to increase the accuracy of the search and minimize the required searching time. Finally, the edge-following method is modified and then conducted based on initial points and contour thresholds to find contours precisely and rapidly. By using the Berkeley segmentation data set with realistic images, the proposed method is demonstrated to take the least computational time for achieving fairly good segmentation performance in various image types.

A multiplication-accumulation computation unit with optimized compressors and minimized switching activities

A low-power multiplication-accumulation computation (MAC) unit using the radix-4 Booth algorithm is proposed; its architectural complexity is reduced and switching activities are minimized. However, to maintain a high performance, the critical delays and hardware complexities of MAC units are explored to derive a MAC unit with high performance and low hardware complexity. A carry-save addition operation with optimized compressors is proposed to omit the use of half adders to reduce the hardware complexity further. A scheme to reduce switching activity is also proposed to lower the power consumption of the MAC unit. In performing a MAC for X/spl times/Y+Z, the effective dynamic ranges of X and Y are detected; the one with the smaller effective dynamic range is processed for Booth decoding so as to increase the probability of the partial products being zero, and thus the switching activity is reduced. Also, the effective dynamic range of the result from this multiplication is estimated and compared with the effective dynamic range of the datum, Z. The larger effective dynamic range of the two data is considered as the effective word length for an addition operation. Pipelined latches are used to make the noneffective operation maintain the status of the previous operation so as to reduce the switching activities from the addition performed in MAC. After the addition operation, sign extension is performed on the result from the effective sign bit copied to non-effective bits to derive at a correct output datum. Compared to conventional MAC units, the proposed one is able to reduce 21.09% to 43.74% of power consumption. Additionally, the proposed MAC unit outperforms conventional ones in comparing the product of critical delay, area, and power consumption.

Automatically-Determined Region of Interest in JPEG 2000

This work presents an automatically-determined region of interest (ROI) scheme embedded in JPEG 2000. The proposed scheme analyzes the image content and then determines the probable ROI masks by examining the significant states of high-frequency subbands generated from embedded block coding with optimized truncation (EBCOT). Additionally, probable ROI masks are constructed in all bit planes of subbands by categorizing sub-blocks as either interesting or uninteresting, smoothing subblocks of interest, and grouping these subblocks based on an or no initial point. The rate-distortion (RD) pairs corresponding to all probable ROI masks are then estimated from the RD distribution during the Tier-2 coding process of EBCOT. Based on these estimations, the Lagrangian multiplier method is employed in the RD function to obtain the optimized ROI mask from the probable masks by minimizing the distortion of the ROI-encoded image at a given bit-rate constraint. ROI-encoded images obtained using the proposed scheme outperform ROI-encoded images obtained via the conventional schemes using fixed-square and object-segmentation masks, as judged by subjective visual perception and objective measurement in terms of peak signal-to-noise ratio. Particularly, the proposed scheme can easily adapt the ROI region with varied sizes and shapes according to the bit-rate constraint whereas the conventional schemes only adopt the fixed-square region and fixed segmented objects. Furthermore, when the proposed scheme is applied to motion JPEG 2000 for video compression, the centroid of the ROI mask in the previous frame can be used as an initial point for merging the subblocks of interest in the current frame to track the ROI masks in a video sequence. Therefore, the proposed scheme can easily be employed to improve the perceptual and objective performance in the ROI coding associated with JPEG 2000 and motion JPEG 2000.

A CMOS photodiode model

This paper utilizes the concepts of equilibrium equations and minority carrier continuity to build and derive a CMOS photodiode model. By using the TSMC 1P3M 0.5 /spl mu/m CMOS technology, photodiodes with two different types of N/sub well/-P/sub Epitaxial/-P/sub substrate/ and N/sub diffusion/-P/sub well/-P/sub Epitaxial/-P/sub su/ /sub bstrate/ were fabricated. Measurements were done to test the photoresponse from 400 nm to 1000 nm. To simulate the photoresponses of N/sub well/-P/sub Epitaxial/-P/sub substrate/ and N/sub diffusion/-P/sub well/-P/sub Epitaxial/-P/sub su/ /sub bstrate/ photodiodes using the proposed model, if an inadequate value of the surface recombination velocity which is affected by the surface defects in the manufacture process is utilized, the proposed model would yield a little larger error in estimating the photoresponse in a shorter wavelength. To overcome this problem, the curve mapping scheme is applied to find the adequate boundary condition of the surface recombination velocity with the least mean squared error thus allowing the proposed model to achieve a good performance. The concept of the model proposed herein could be utilized in designing any CMOS photodiode for simulating its photo-electronic characteristics in various industrial applications.

Tracking and counting people in visual surveillance systems

The greatest challenge on monitoring characters from a monocular video scene is to track targets under occlusion conditions. In this work, we present a scheme to automatically track and count people in a surveillance system. First, a dynamic background subtraction module is employed to model light variation and then to determine pedestrian objects from a static scene. To identify foreground objects as characters, positions and sizes of foreground regions are treated as decision features. Moreover, the performance to track individuals is improved by using the modified overlap tracker, which investigates the centroid distance between neighboring objects to help on target tracking in occlusion states of merging and splitting. On the experiments of tracking and counting people in three video sequences, the results exhibit that the proposed scheme can improve the averaged detection ratio about 10% as compared to the conventional work.