P. Vichoudis

The versatile link, a common project for super-LHC

A common project to develop a bi-directional, radiation tolerant, high speed (4.8 Gb/s) optical link for future high energy physics experiments is described. Due to be completed in 2012, it targets the upgrade programs of detectors installed at CERNs Large Hadron Collider (LHC). The development of radiation and magnetic field tolerant opto-electronic devices, fibre and connectors is described. Both Single-Mode and Multi-Mode versions of the system operating respectively at 850 nm and 1310 nm wavelength are proposed. First results at component and system level are presented, based mostly on commercially available devices.

The Versatile Transceiver: towards production readiness

Detectors involved in the upgrade programme of the LHC will need high-speed optical links to transfer readout and control data. The link front-end will be based on a radiation tolerant opto-electronic module, the Versatile Transceiver (VTRx), developed under the Versatile Link project. In this contribution we present a test system and protocol to be used to verify the compliance of the VTRx modules to the specifications, and a Versatile Link demonstrator based on the VTRx and the Gigabit Link Interface Board. Finally, we introduce the Small Footprint VTRx which is being designed for the CMS Tracker upgrade.

The Gigabit Link Interface Board (GLIB), a flexible system for the evaluation and use of GBT-based optical links

The Gigabit Link Interface Board (GLIB) is an evaluation platform and an easy entry point for users of high speed optical links in high energy physics experiments. Its intended use ranges from optical link evaluation in the laboratory to control, triggering and data acquisition from remote modules in beam or irradiation tests. The GLIB is an FPGA-based Advanced Mezzanine Card (AMC) conceived to serve a small and simple system residing either inside a Micro Telecommunications Computing Architecture (μTCA) crate, or on a bench with a link to a PC. This paper presents the architecture of the GLIB, its features as well as examples of its use in different setups.

The Gigabit Link Interface Board (GLIB) ecosystem

The Gigabit Link Interface Board (GLIB) project is an FPGA-based platform for users of high-speed optical links in high energy physics experiments. The major hardware component of the platform is the GLIB Advanced Mezzanine Card (AMC). Additionally to the AMC, auxiliary components are developed that enhance GLIB platforms I/O bandwidth and compatibility with legacy and future triggering and/or data acquisition interfaces. This article focuses on the development of the auxiliary components that together with the GLIB AMC offer a complete solution for beam/irradiation tests of detector modules and evaluation of optical links.

Modal Dispersion Mitigation in Standard Single-Mode Fibers at 850 nm With Fiber Mode Filters

We investigate the possibility of using a fiber which supports only the fundamental LP01 mode at 850 nm as a mode filter to overcome modal dispersion in standard single-mode fiber links that employ either multitransverse or single-transverse-mode vertical-cavity surface-emitting lasers. The individual power penalties due to modal noise and modal crosstalk effects in the link are investigated.

The FC7 AMC for generic DAQ & control applications in CMS

The FC7 is a flexible, μTCA compatible Advanced Mezzanine Card (AMC) for generic data acquisition/control applications. Built around the Xilinx Kintex-7 FPGA, the FC7 provides developers with a platform which has access to a large array of configurable I/O, primarily delivered from on-board FPGA Mezzanine Card (FMC) sockets. Targeting users of high-speed optical links in high energy physics experiments, the board is capable of driving and receiving links up to 10 Gbps. This paper presents test results from the first set of pre-production prototypes and reports on FC7 uses and applications towards upgrades in CMS.

Evaluation of the ATLAS-MPX devices for neutron field spectral composition measurement in the ATLAS experiment

A network of 15 Medipix2-based devices (ATLAS-MPX devices) has been installed at various positions in the ATLAS detector within the framework of the ATLAS-MPX collaboration. The aim of the network is to perform real-time measurement of spectral characteristics and composition of the main radiation types in the experiment including slow and fast neutrons, especially during the initial low luminosity LHC operation. This contribution describes the network structure and focuses on the neutron efficiency calibration process of the ATLAS-MPX devices and its simulation in order to predict the behavior of the device in complex neutron fields.

Implementation of on-line data reduction algorithms in the CMS Endcap Preshower Data Concentrator Cards

The CMS Endcap Preshower (ES) sub-detector comprises 4288 silicon sensors, each containing 32 strips. The data are transferred from the detector to the counting room via 1208 optical fibres running at 800Mbps. Each fibre carries data from two, three or four sensors. For the readout of the Preshower, a VME-based system, the Endcap Preshower Data Concentrator Card (ES-DCC), is currently under development. The main objective of each readout board is to acquire on-detector data from up to 36 optical links, perform on-line data reduction via zero suppression and pass the concentrated data to the CMS event builder. This document presents the conceptual design of the Reduction Algorithms as well as their implementation in the ES-DCC FPGAs. These algorithms, as implemented in the ES-DCC, result in a data-reduction factor of 20.

An FPGA-based track finder for the L1 trigger of the CMS experiment at the high luminosity LHC

A new tracking system is under development for operation in the CMS experiment at the High Luminosity LHC. It includes an outer tracker which will construct stubs, built by correlating clusters in two closely spaced sensor layers for the rejection of hits from low transverse momentum tracks, and transmit them off-detector at 40 MHz. If tracker data is to contribute to keeping the Level-1 trigger rate at around 750 kHz under increased luminosity, a crucial component of the upgrade will be the ability to identify tracks with transverse momentum above 3 GeV/c by building tracks out of stubs. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are identified using a projective binning algorithm based on the Hough Transform. A hardware system based on the MP7 MicroTCA processing card has been assembled, demonstrating a realistic slice of the track finder in order to help gauge the performance and requirements for a full system. This paper outlines the system architecture and algorithms employed, highlighting some of the first results from the hardware demonstrator and discusses the prospects and performance of the completed track finder.

Single-Event Upsets in photodiodes for multi-Gb/s data transmission

A Single-Event Upset study has been carried out on PIN photodiodes from a range of manufacturers. A total of 22 devices of eleven types from six vendors were exposed to a beam of 63 MeV protons. The angle of incidence of the proton beam was varied between normal and grazing incidence for three data-rates (1.5, 2.0 and 2.5 Gb/s). We report on the cross-sections measured as well as on the detailed statistics of the interactions that we measured using novel functionalities in a custom-designed Bit Error Rate Tester. We have observed upsets lasting for multiple bit periods and have measured, over a large range of input optical power, a small fraction of errors in which an upset causes a transmitted zero to be detected as a one at the receiver.