P. Waind

Advanced SPICE modeling of large power IGBT modules

An enhanced insulated gate bipolar transistor (IGBT) model based on the Kraus model with new derivations based on an extra parameter accounting for p-i-n injection was developed to allow simulation of both trench and DMOS IGBT structures. Temperature dependence was also implemented in the model. The model was validated against steady-state and transient measurements done on an 800-A 1.7-kV Dynex IGBT module at 25/spl deg/C and 125/spl deg/C. The Spice model has also shown excellent agreement with mixed mode MEDICI simulations. The Spice model also takes into account for the first time the parasitic thyristor effect allowing the dc and dynamic temperature-dependent latchup modeling of power modules as well as their temperature-dependent safe operating area.

1.2 kV trench insulated gate bipolar transistors (IGBT's) with ultralow on-resistance

In this letter, we report the full development of 1.2 kV Trench IGBTs with ultralow on-resistance, latch-up free operation and highly superior overall performance when compared to state of the art IGBTs. The minimum forward voltage drop at the standard current density of 100 A/cm/sup 2/ was 1.1 V for nonirradiated devices and 2.1 V for irradiated devices. The maximum controllable current density was in excess of 1000 A/cm/sup 2/.

The effect of static and dynamic parasitic charge in the termination area of high voltage devices and possible solutions

Parasitic charge in the passivation layer or at the interface may severely degrade the breakdown capability of high voltage devices. This is attributed to the change of the electric field contours in the presence of the interface charge from an optimal distribution to an unbalanced distribution. A solution to minimise this effect is proposed in this paper. The proposed breakdown termination technique can be used in a wide range of devices such as power MOSFETs, IGBTs or MOS-controlled thyristors and it is especially effective at voltages above 1.2 kV when the n-drift concentration is reduced.

Ultra-high voltage device termination using the 3D RESURF (super-junction) concept - experimental demonstration at 6.5 kV

We propose here and experimentally demonstrate a novel breakdown termination termed The 3D-RESURF Termination that can be applied to a large class of high to ultra-high voltage devices, such as diodes, thyristors, IGBTs, etc. The novel termination is based on the 3D RESURF concept (lateral super-junction) proposed by us and others for lateral integrable devices. We have fabricated vertical diodes and IGBTs rated at 6.5 kV and demonstrated that the use of 3D RESURF p and n layers placed between adjacent p+ floating rings resulted in maximum breakdown voltage (6.5 kV). This is 2.5 kV larger than the breakdown voltage obtained from a standard field ring terminated device fabricated side by side on the same chip. Moreover, the 3D-RESURF edge termination uses a total length of 1 mm, which is only 60% of standard 6.5 kV JTE terminations. This results in area saving of up to 40%, depending on the active area of the chip.

High power density IGBT module for high reliability applications

The blocking voltage rating of an IGBT module have reached up to 6.5kV, however for true high power application such as traction drives, the current rating has to increase as well. This is mainly achieved by either improving the packing density of semiconductor chips per given module footprint and or improving the current density of the semiconductor chips used in the IGBT module. In this paper we explore how the current ratings of an 800A, 3.3KV module with 140 × 130mm footprint can be improved for a fixed base-line reliability.

On-state analytical modeling of IGBTs with local lifetime control

A two-dimensional on-state analytical model of the insulated gate bipolar transistor (IGBT) with local lifetime control is developed. The model accounts for the effect of local lifetime killing in particular the effective value of the lifetime and the position of the local lifetime control region on the excess carrier distribution in the IGBT during its on-state operation. It is shown that the local lifetime killing in the vicinity of the anode junction causes a reduction in the anode injection efficiency leading to improved on-state/turn-off behavior. The accuracy of the analytical model is verified through numerical simulations carried out using the MEDICI device simulator.

Silicon MOS controlled bipolar power switching devices using trench technology

The next generation of power devices are likely to extend MOS controlled bipolar (MCB) device concepts to cover very high voltage (up to 8kV) applications. Such devices will be based on utilizing the advantages brought about by trench gate MOSFETs to control bipolar current flow. In this paper we give a review of development of trench gate IGBTs and we describe briefly new promising device structures based on trench technology which use PIN diode and thyristor type carrier distributions to reduce power losses within the device.

Analysis of lifetime control in high-voltage IGBTs

Abstract This paper discusses the effectiveness of the lifetime control technology in high-voltage insulated gate bipolar transistors (IGBTs) by using both numerical simulations and a two-dimensional on-state analytical model specifically developed for IGBTs with local lifetime killing. A comprehensive study of the static and dynamic performance of IGBTs using lifetime control technology in comparison with IGBTs featuring reduced anode injection efficiency structures is made. We show for the first time that IGBTs with low anode injection efficiency have similar or better on-state/switching trade-off when compared to equivalent IGBTs using lifetime control technology. We also show that both the local lifetime control and the low anode injection efficiency techniques are superior to full irradiation. The low anode injection efficiency is particularly better than the local lifetime control technique when applied to punch-though IGBTs while no difference between the two is found in non-punch-though IGBTs.

An experimental and numerical investigation of IGBT blocking characteristics

The breakdown characteristics of 600 V DMOS IGBT are investigated in detail using both experimental results and numerical simulations with self-heating effects included. The blocking characteristics of 1.8 kV trench IGBT are also studied. It is shown that thermally assisted impact ionization causes the IGBT device to breakdown. A negative resistance region of breakdown curve is observed, and the increased bipolar current gain results in more significant negative resistance part for the PT device. With negative charge introduced into the gate oxide, the breakdown characteristics of the trench IGBT can be improved.

Suppression of parasitic JFET effect in trench IGBTs by using a self-aligned p base process

Abstract This paper presents the suppression of the parasitic JFET effect in high voltage Trench insulated gate bipolar transistors (IGBTs) by employing a new self-aligned p base process. The parasitic JFET effect is no longer negligible because the lowly doped n− drift region becomes longer and at the same time the cell current density becomes lower in high voltage applications. The self-aligned p base process is based on the use of a common nitride mask for trench etching and p boron diffusion and therefore eliminates an extra process mask. Furthermore, the self-aligned p base structure effectively suppresses the parasitic JFET effect into a small area near the trench source and results in considerably enhanced on-state performance. Extensive numerical simulations using the MEDICI simulator have been carried out and the results show that by using the new self-aligned p base process one can relieve the pressure resulted from processing very deep trenches in high voltage Trench IGBTs.