Paul E. Schardt

Dynamic virtual software pipelining on a network on chip

Software Pipelining On a Network On Chip

Multithreaded physics engine with predictive load balancing

Network On Chip With Partitions

Network on chip with low latency, high bandwidth application messaging interconnects that abstract hardware inter-thread data communications into an architected state of a processor

Software Trace Collection and Analysis Utilizing Direct Interthread Communication On A Network On Chip

Monitoring Software Pipeline Performance On A Network On Chip

Ordered And Unordered Network-Addressed Message Control With Embedded DMA Commands For A Network On Chip

Rolling Context Data Structure for Maintaining State Data in a Multithreaded Image Processing Pipeline

Updating Ray Traced Acceleration Data Structures Between Frames Based on Changing Perspective