Paul F. Greier

A one-megapixel reflective spatial light modulator system for holographic storage

A prototype reflective spatial light modulator (SLM) system has been developed for writing megabit pages of data into a holographic medium at a rate of 12 pages per minute. The SLM is based upon a crystalline-silicon reflective active-matrix array with integrated data drivers, using liquid crystal (LC) electrooptics and a personal computer system with an interface to provide data. The LC has been optimized for high contrast and efficiency with coherent illumination. The resolution-limited contrast was measured at 4:1, which was high enough to provide bit-error-free charge-coupled-device images using modulation and error-correction codes.

A 10.5-in.-diagonal SXGA active-matrix display

A 157-dot-per-inch, 262K-color, 10.5-in.- diagonal, 1280 × 1024 (SXGA) display has been fabricated using a six-mask process with Cu or Al-alloy thin-film gates. The combination of high resolution and gray-scale accuracy has been shown to render color images and text with paperlike legibility. The low-resistivity gate metallization and trilayer-type TFTs with a channel length of 6-8 µm were fabricated with a six-mask process which is extendible to larger, higher-resolution displays. A combination of double-sided driving and active line repair was used so that open gate lines or data lines did not result in visible line defects. A flexible drive-electronics system was developed to address the display and characterize its performance under different drive conditions.

A 3.5 ns/77 K and 6.2 ns/300 K 64 K CMOS RAM with ECL interfaces

A 64 K CMOS RAM with emitter-coupled logic (ECL) interfaces having access times of 6.2 ns at room temperature and with a CMOS process specifically optimized for low-temperature operation, 3.5 ns at liquid nitrogen (LN) temperature, is presented. The CMOS processes feature a 0.5 mu m L/sub eff/, self-aligned TiSi/sub 2/ double-level metal, and an average minimum feature size of 1.35 mu m. Circuits keyed to high-speed operation are described with emphasis on low power and safe operation. Unique aspects of LN-temperature operation including circuit-device interactions, the impact of velocity saturation effects on channel length, temperature and power supply sensitivities, and the characteristics of the ECL-to-CMOS receiver circuits are discussed. >

25.4: Color and Luminance Management for High-Resolution Liquid-Crystal Displays

A new method of color management is described which takes advantage of the high pixel density achievable with TFTLCDs. In this method, a calibration 10-bit look-up-table can be loaded into the monitor and implemented as a 2×2 spatial dither block to provide a 10-bit color palette for 8-bit color drive. Other subpixel dithering techniques are also described for monochrome and color high-resolution TFTLCDs. These techniques can create a very large palette, and combined with a 10-bit digital data source to achieve precise luminance and color calibration.

Active line repair for thin-film-transistor liquid crystal displays

A new method for repairing line defects during panel fabrication is described for high-resolution thin-film-transistor liquid crystal displays (TFT/LCDs). This approach uses electronic means in conjunction with physical rewiring to supply the appropriate data signal to the undriven segment of an open data line. Active line repair is simple and inexpensive, with the capacity for repairing numerous line defects. We have successfully implemented this repair approach on 10.4-in.-diagonal, 157-dpi prototype TFT/LCDs. This method is particularly suited for lower-volume, large-area, high-resolution TFT/LCDs, which are difficult to produce with high yield.