Alphonso P. Lanzetta

Packaging the Blue Gene/L supercomputer

As 1999 ended, IBM announced its intention to construct a one-petaflop supercomputer. The construction of this system was based on a cellular architecture--the use of relatively small but powerful building blocks used together in sufficient quantities to construct large systems. The first step on the road to a petaflop machine (one quadrillion floating-point operations in a second) is the Blue Gene®/L supercomputer. Blue Gene/L combines a low-power processor with a highly parallel architecture to achieve unparalleled computing performance per unit volume. Implementing the Blue Gene/L packaging involved trading off considerations of cost, power, cooling, signaling, electromagnetic radiation, mechanics, component selection, cabling, reliability, service strategy, risk, and schedule. This paper describes how 1,024 dual-processor compute application-specific integrated circuits (ASICs) are packaged in a scalable rack, and how racks are combined and augmented with host computers and remote storage. The Blue Gene/L interconnect, power, cooling, and control systems are described individually and as part of the synergistic whole.

A 10.5-in.-diagonal SXGA active-matrix display

A 157-dot-per-inch, 262K-color, 10.5-in.- diagonal, 1280 × 1024 (SXGA) display has been fabricated using a six-mask process with Cu or Al-alloy thin-film gates. The combination of high resolution and gray-scale accuracy has been shown to render color images and text with paperlike legibility. The low-resistivity gate metallization and trilayer-type TFTs with a channel length of 6-8 µm were fabricated with a six-mask process which is extendible to larger, higher-resolution displays. A combination of double-sided driving and active line repair was used so that open gate lines or data lines did not result in visible line defects. A flexible drive-electronics system was developed to address the display and characterize its performance under different drive conditions.

Electrical characteristics of high-performance pin-in-socket and pad-on-pad connectors

Two types of high-performance, high-density connectors, pin-in-socket, and pad-on-pad, are investigated for providing many hundreds of signal contacts in large-panel, card-to-board applications. The two examples were selected as top-of-the-line contenders for mechanically robust interconnections that can be used for transmitting 500 Mb/s and even 1 Gb/s data-rate signals, and with comparable cost. While the pinned connector offers a proven technology, the newly introduced pad-on-pad connector can provide at least 1.5 times higher number of signal contacts and lower crosstalk. Experimental characterization of signal integrity, connector delay, impedance discontinuity, crosstalk, and maximum current capability, is performed for both connectors in order to compare their relative performance.

Broadband characterization of low dielectric constant and low dielectric loss CYTUF cyanate ester printed circuit board material

Dielectric constant /spl epsi//sub r/ and broadband dielectric loss tan /spl delta/ measurements were performed for the thermoplastic toughened cyanate ester printed circuit board CYTUF material. Characterization of tan /spl delta/ over the 1-8 GHz frequency range was made using a simple short-pulse propagation technique. All the measurements were taken on four-metal-layer, 23/spl times/36 cm cards with representative transmission line structures. It was found the /spl epsi//sub r/=3.48-3.64 and tan /spl delta/=0.0095-0.01, which are much lower than for standard FR-4 material. The impact of improved characteristics on wireability is analyzed through simulations of representative printed circuit board interconnections.

Characterization and performance evaluation of differential shielded cables for multi-Gb/s data-rates

This paper compares several differential cable characteristics that were evaluated for multi-Gb/s data-rates for both data and clock paths for 1-10 m lengths. Time-domain measurements are shown for the unassembled and connectorized cables and for representative card-plus-cable signal paths and the performance limiting factors are highlighted. Techniques are shown for developing coupled-line models for odd and even excitations for all the components in a full chip-to-chip path in order to make realistic data-rate predictions.

Intra-system interconnects for digital communications

The electrical performance of three types of cables, namely coaxial, shielded ribbon and flexible-film is characterized for interconnection applications inside high-speed digital systems. Measurements are made of the cable attenuation signal propagation integrity, bit-error rate, connector discontinuities and crosstalk. The electrical parameters obtained experimentally are used in simulations to predict the bandwidth and range of useful lengths for these cables. The paper highlights the performance-limiting factors such as connector and via discontinuities, and printed-circuit-board wiring losses and the practical density and extendibility limitations are discussed.<<ETX>>