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Dive into the research topics where Paul J. Rudeck is active.

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Featured researches published by Paul J. Rudeck.


2006 21st IEEE Non-Volatile Semiconductor Memory Workshop | 2006

Effects of Source Diffusion on SILC and Cycling-Induced Charge Loss in Source-Bias Erase Flash Cells

Chun Chen; Jeff Kessenich; Paul J. Rudeck; Ramin Ghodsi; Wayne I. Kinney; Andrew Bicksler; Kirk Prall; Lee R. Nevill; Andrei Mihnea

A recent report reveals that in source-bias erase flash cells, light source doping can cause room temperature erratic charge loss after program/erase cycling. In this paper, we present tunnel oxide hole trapping and stress induced leakage current (SILC) measurements under source-bias erase stress conditions, in cell structures with different source doping profiles. Data suggests the deep depletion in cell source during erase causes hole trapping in tunnel oxide above the source diffusion, which is responsible for the room temperature charge loss after P/E cycling for light doping source


IEEE Transactions on Electron Devices | 2002

Direct observation of secondary ionization current in n-channel MOSFETs

Andrei Mihnea; Paul J. Rudeck; Chun Chen; Kirk Prall; Ramin Ghodsi

Hot-electron current in an n-channel MOSFET at high drain bias and on or off gate bias generates secondary currents amounting to a fraction of the primary (drain) current, in a surrounding n-well and the underlying p-substrate for a triple well device. Secondary current can also be collected in the source for the gate-off condition. The relative magnitude of these secondary currents is studied depending on MOSFET length and channel doping concentration. For a MOSFET with a heavy doping concentration in the channel near the drain junction, it is shown that a significant part of the secondary current is made of electrons originating from the space charge region of the drain, that escape the drain field and diffuse through the neutral substrate toward the source and surrounding n-well. These electrons are likely the product of secondary impact ionization by holes generated in the space-charge region of the drain. Similar secondary current is collected in the n-well surrounding a MOSFET in Fowler-Nordheim (FN) tunneling from the inversion layer to the gate. In this case, too, secondary electrons generated by holes returning from the oxide into the MOS channel appear to escape into the p-type body and flow to the surrounding n-well. These findings contradict the belief that secondary currents associated with hot carrier phenomena are only induced by hot carrier generated light, or secondary bipolar injection. Secondary ionization as a source of secondary current was rejected for older MOS devices. This paper shows experimentally and theoretically that secondary ionization and the ensuing hot carrier escape have become significant in todays deep submicron devices.


Archive | 1999

Flash memory cell

Andrei Mihnea; Paul J. Rudeck; Chun Chen


Archive | 2001

Flash memory cell for high efficiency programming

Andrei Mihnea; Paul J. Rudeck; Chun Chen


Archive | 2006

Minimizing adjacent wordline disturb in a memory device

Paul J. Rudeck; Andrei Mihnea; Andrew Bicksler


Archive | 2001

Flash memory device and method of erasing

Andrei Mihnea; Chun Chen; Paul J. Rudeck; Andrew Bicksler


Archive | 2004

Vertical floating gate transistor

Paul J. Rudeck


Archive | 2002

Method and structure for an improved floating gate memory cell

Paul J. Rudeck


Archive | 2003

Vertical flash memory cell with buried source rail

Paul J. Rudeck


Archive | 1998

Method and structure for an oxide layer overlaying an oxidation-resistant layer

Paul J. Rudeck; Kelly T. Hurley

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