Paul J. Tsang

Design and characteristics of the lightly doped drain-source (LDD) insulated gate field-effect transistor

The LDD structure, where narrow, self-aligned n-regions are introduced between the channel and the n+source-drain diffusions of an IGFET to spread the high field at the drain pinchoff region and thus reduce the maximum field intensity, is analyzed. The design is shown, including optimization of the n-dimensions and concentrations and the boron channel doping profile and an evaluation of the effect of the series resistance of the n-regions on device transconductance. Characteristics of experimental devices are presented and compared to those of conventional IGFETs. It is shown that significant improvements in breakdown voltages, hot-electron effects, and short-channel threshold effects can be achieved allowing operation at higher voltage, e.g., 8.5 versus 5 V, with shorter source-drain spacings, e.g., 1.2 versus 1.5 µm. Alternatively, a shorter channel length could be used for a given supply voltage. Performance projections are shown which predict 1.7 × basic device/circuit speed enhancement over conventional structures. Due to the higher voltages and higher frequency operation, the higher performance results in an increase in power which must be considered in a practical design.

Fabrication of high-performance LDDFET's with Oxide sidewall-spacer technology

A fabrication process for the Lightly Doped Drain/Source Field-Effect Transistor, LDDFET, that utilizes RIE produced SiO 2 sidewall spacers is described. The process is compatible with most conventional polysilicon-gated FET processes and needs no additional photomasking steps. Excellent control and reproducibility of the n-region of the LDD device are obtained. Measurements from dynamic clock generators have shown that LDDFETs have as much as 1.9X performance advantage over conventional devices.

The low-temperature specific-heats of several palladium-rich palladium-antimony alloys

Abstract The low-temperature specific-heat coefficients γ and the corresponding Debye temperatures θ were determined for four palladium-rich terminal solid-solution alloys containing 3, 6, 9 and 12 at.% antimony. The specific-heat results can be correlated with the room-temperature magnetic susceptability and the vacant d -states of palladium decrease as the solute concentration increases but at a reduced rate when compared with noble metal-palladium systems. Comparison with Mossbauer results obtained over the same concentration range of the palladium-antimony system and optical data on noble metal-palladium alloys suggest that a screening model, in which each atomic cell is electrically neutral, is a more appropriate description than a charge transfer model.