Peter Cirigliano

A novel plasma-assisted shrink process to enlarge process windows of narrow trenches and contacts for 45-nm node applications and beyond

Limits to the lithography process window restrict the scaling of critical IC features such as holes (contact, via) and trenches (required for interconnects and double patterning applications). To overcome this problem, contacts or trenches can be oversized during the exposure, followed by the application of a shrink technique. In this work, a novel shrink process utilizing plasma-assisted polymer deposition is demonstrated: a polymer is deposited on the top and sidewalls of photoresist by alternating deposition and etch steps, reducing the dimension of the lithography pattern in a controlled way. Hence very small patterns can be defined with wide process latitudes. This approach is generic and has been applied to both contacts and trenches. The feasibility of the plasma-assisted shrink technique was evaluated through extensive SEM inspections after lithography, after shrink, and after etch, as well as through electrical evaluations.

Novel patterning shrink technique enabling sub-50 nm trench and contact integration

In this paper we demonstrate the feasibility of integrating a technique for shrinking the lithography-defined feature size by using a plasma process prior to etch. The technique is based on a sequential deposition and selective removal of a polymer coating formed on the top and sidewalls of the developed resist. This method can be applied to both contacts and trenches and allows tuning of the shrink amount. Yielding damascene trenches down to 45 nm were obtained, shrunk from a 85 nm print, while functional 100 nm contacts were formed starting from a 150 nm print. In both cases excellent within-wafer non-uniformities were achieved.

Plasma-assisted CD shrink and overlay metrology techniques for double patterning

Double patterning lithography is being considered for semiconductor manufacturing at the 32 nm technology node. In the double exposure approach, double patterning is accomplished with two cycles of lithography and etch. A tight overlay tolerance is required to prevent registration errors between the lithography steps from transferring as CD errors in the final pattern. Here we present a double patterning scheme with a novel plasma-assisted CD shrink technique to reduce the feature size after each lithography exposure, providing both pitch and CD shrink. Scatterometry-based metrology is shown to be able to detect registration errors down to 1 nm.