Peter V. Wright

Innovative architectures for advanced handset power amplifier performance

This paper describes the development of a new innovative low-band RF power amplifier for cellular handsets. The amplifier module is realized in a compact 3×3×1 mm3 package, yet is load insensitive and has excellent performance characteristics. The small size was achieved through a number of design innovations. The active die was implemented on a high-performance biHEMT process, which comprises E and D-mode pHEMT FETS with HBT bipolar transistors. This enabled a highlevel on on-chip integration. For the quadrature combiner a new circuit was developed which is very compact compared to classic architectures and has low insertion loss. Likewise, a high-performance compact on-die four-port quadrature splitter was developed for the interstage. The latter was smaller than previous solutions with improved performance. In a further innovation, the output harmonic terminations, bias chokes and combiner were implemented on an Integrated Passive Device (IPD) process for reasons of size and cost. The GaAs and IPD die were both Cu bump flip-chip mounted bringing advantages in size, cost, and device yield. Cost and performance variability were reduced as no critical RF functions were included in the laminate.