T. Paul Chow

High voltage normally-off GaN MOSC-HEMTs on silicon substrates for power switching applications

We report our experimental results on high voltage normally-off GaN MOS channel HEMTs (MOSC-HEMT) on silicon substrates with best specific on-resistance (Ron,sp) of 4 mΩ-cm2 and breakdown voltage (BV) of 840V. The switching performance of the device was evaluated by SPICE simulations of a buck-boost converter and showed a system efficiency of 10% higher than that using a commercial GaN HEMT. A bidirectional switch consisted two GaN MOSC-HEMTs were also demonstrated.

Smart Power Devices and ICs Using GaAs and Wide and Extreme Bandgap Semiconductors

We evaluate and compare the performance and potential of GaAs and of wide and extreme bandgap semiconductors (SiC, GaN, Ga2O3, and diamond), relative to silicon, for power electronics applications. We examine their device structures and associated materials/process technologies and selectively review the recent experimental demonstrations of high voltage power devices and IC structures of these semiconductors. We discuss the technical obstacles that still need to be addressed and overcome before large-scale commercialization commences.

Safe operating area of AlGaAs/InGaAs/GaAs HEMT power transistors

A study of the physical phenomena leading to second breakdown of AlGaAs/InGaAs/GaAs power HEMTs in high voltage and high current conditions is presented. The boundary of the safe operating area (SOA) is measured in both DC and pulsed conditions. The effect of gate de-biasing and triggering of the parasitic bipolar transistor are identified as reasons for deterioration of the SOA. A model for these effects is also presented.

Gallium arsenide IC technology for power supplies on chip

This research presents a power IC technology platform based on AlGaAs/InGaAs/AlGaAs pseudomorphic field effect transistors (pHEMTs) on a GaAs substrate. A quantitative assessment of a foundry-available 11 V GaAs pHEMT process indicates that due to their superior material properties, the intrinsic figure of merit for pHEMT switching devices show an order of magnitude improvement over the state-of-the-art Silicon NMOS transistors. The characterization results GaAs pHEMTs with a breakdown voltage up to 47V is presented and shown to be comparable to GaN based transistors for power switching applications. An integrated pHEMT DC-DC converter that can switch at frequencies above 100 MHz are demonstrated. A 4.2 V pHEMT buck converter designed for envelope tracking applications achieved 88% conversion efficiency at 100 MHz.

Avalanche Breakdown Design Parameters in GaN

We have studied the avalanche breakdown design parameters of GaN n+/p and p+/n junctions in the voltage range of 1.2 to 12 kV using numerical simulations and analytical calculations. Important analytical models regarding the relationships between breakdown voltages, depletion width, maximum junction electric field and doping concentrations have been extracted which shows very high consistency with the results from numerical simulations. These analytical models can be used as guidelines in the designing of GaN high voltage power devices. The multiplication factors Mn and Mp have also been obtained and the analytical models have been extracted. The results showed that in GaN, n+/p junction is better than p+/n for the main voltage blocking junction due to a sharper avalanche current increase.

Double Recessed GaAs pHEMTs for 20-50 V Power Switching

A normally-OFF RF pHEMT process is optimized for a blocking voltage in the 20-50V range for power switching ICs. Due to their superior material properties, the intrinsic figure of merit for pHEMT switching devices show an order of magnitude improvement over the state-of-the-art Silicon NMOS transistors and in the same range as lateral GaN HEMTs. In a scenario where innovations in silicon based low voltage power transistors have saturated, this approach is a new way of breaking the paradigm and making large leaps in performance.

Robustness of GaN vertical superjunction HEMT

We have examined the robustness of the novel enhancement-mode GaN vertical superjunction HEMT using numerical simulations, which has been designed previously and projected to have best Ron, sp of 4.2 mQ-cm2 and BV of 12.4kV, and compared it with a GaN vertical HEMT with conventional drift region. The GaN vertical superjunction HEMT with 8 μm pillar width shows 7X higher on-state current level and 1/5 of the Ron, sp compared with The simulated on-state breakdown voltage of the GaN vertical superjunction HEMT structure shows 4.5% drop from the off-state breakdown voltage, and is only slightly higher than the 1.7% drop of the conventional GaN vertical HEMT.

SECOND BREAKDOWN AND SAFE OPERATING AREA OF E-MODE POWER pHEMTs

The safe operating area of E-pHEMTs have been explored using device simulations. It is proposed that the second breakdown is triggered by the debiasing of the channel potential due to the gate reverse current at high drain voltages. A mathematical description of this behavior and experimental results are presented.