Peter Weger

17-GHz 50-60 mW power amplifiers in 0.13-/spl mu/m standard CMOS

Two versions of power amplifiers with different output matching approaches for the 17-GHz band were realized in 0.13-mum standard digital CMOS technology with 1.5-V supply voltage. The power amplifier with an external matching network delivers 17.8-dBm saturated output power with 15.6% power added efficiency (PAE). The small-signal gain is 11.5 dB. The fully integrated power amplifier delivers 17.1-dBm saturated output power with 9.3% PAE. The small-signal gain is 14.5 dB. No external radio frequency components are required

A Fully Integrated 3.3–3.8-GHz Power Amplifier With Autotransformer Balun

This paper demonstrates the usage of a differential autotransformer as an output balun for an integrated power amplifier (PA) operating at low-gigahertz frequencies. In comparison with a conventional transformer balun, an autotransformer balun offers lower power losses, thereby increasing the saturated output power and reducing the gain compression at the edge of target power range. A theoretical analysis of an integrated autotransformer is given, comparison with a magnetic transformer is performed. The concept was experimentally verified in a fully integrated PA for a 3.3-3.8-GHz WiMAX band fabricated in SiGe : C bipolar technology. The active part of the amplifier implements the derivative superposition method aimed at linearizing the power transfer characteristic. Measured PA delivers saturated output power above 29 dBm. The maximum achieved power-added efficiency exceeds 40% at 3.4 GHz. At 3.5 GHz, 1-dB gain compression occurs for P out = 24.6 dBm.

Highly Efficient Packaged 11–13 GHz Power Amplifier in SiGe-Technology With 37.3% of PAE

A power amplifier for a frequency range of 11-13 GHz that is incorporated in 0.35 μm SiGe-technology is presented in this letter. The two-stage push-pull amplifier uses monolithically integrated transformers for input and interstage matching and a monolithically integrated modified LC-balun as an output-matching network. For stabilization purposes and gain improvement in the operating frequency range a passive frequency selective feedback in parallel to the base-collector was introduced. The power amplifier is mounted on a 7 × 7 mm VQFN package. From a single 1.8 V voltage supply, the amplifier has a power-added efficiency of greater than 30% from 11.2 to 13 GHz with a maximum of 37.3% at 12.5 GHz. The maximum output power is 23.4 dBm (saturation), as measured in the continuous mode.

A monolithic 2.4 GHz, 0.13 /spl mu/m CMOS power amplifier with 28 dBm output power and 48% PAE at 1.2 V supply

A two stage differential (push-pull) Class AB power amplifier for 2.4 GHz has been realized in a 0.13 /spl mu/m standard CMOS technology. A microstrip line matching network was used for the impedance transformation. A maximum output power of 28 dBm was achieved at 1.2 V supply voltage and 48% power added efficiency. The small signal gain is 26 dB.

A Narrow-band 8.7 GHz SiGe HBT LNA with a Passive Frequency Selective Feedback

Abstract This paper presents a low noise amplifier (LNA) with differential output using a passive frequency selective feedback. The introduced feedback stabilizes the amplifier at lower frequencies and improves the gain in the desired frequency band. The LNA consists of two stages. Additionally, a buffer at the output is added for measurements. The amplifier was implemented in a 0.35 μm SiGe technology. For measurements the LNA was bonded to a substrate. A peak gain of 28.1 dB and a minimum noise figure of 2.2 dB at a supply voltage of 3 V were achieved.

Monolithically integrated SD frequency synthesiser with distributed reference spurs

Monolithically integrated fractional-N frequency synthesiser controlled by the dual edge triggered (DET) MASH ΣΔ modulator is presented. A DET modulator offers two advantages over the single edge triggered implementation: (1) it reduces the modulators area by 15–20% and (2) it distributes switching noise power in such a manner that it does not degrade the first reference spur of a synthesiser but shifts the glitch energy to higher multiples of the reference frequency. A benefit of such a reference spur power distribution is demonstrated. A fabricated 11 GHz fully integrated sigma–delta phase-locked loop (PLL) with the DET modulator exhibits the first reference spur below –66 dBc over the whole locking range.