Peyman Ahmadi

High-quality factor asymmetric-slope band-pass filters: A fractional-order capacitor approach

This study presents new techniques for implementing continuous-time second-order band-pass filters with high-quality factors and asymmetric slopes. The techniques are centred around the realisation of two non-conventional transfer functions which include the non-integer-order Laplacian operator sα; 0<α<1. Four main possible circuit realisations; one based on a frequency-dependent negative resistor (FDNR), another based on an inductor and two based on multiple amplifier biquads (MABs) are given and verified using Spice and experimentally for both transfer functions. In addition, a field programmable analogue array (FPAA) realisation is tested and verified. Last but not least, a possible realisation using current conveyors is also given, tested and verified.

10-Gb/s 0.13-

This paper presents an inductorless 0.13- μm CMOS TIA structure that is a modified version of a regulated cascode (RGC) TIA. An immittance converter is incorporated to reduce power consumption while increasing transimpedance gain. Measured 3-dB bandwidth is 7 GHz, sufficient for 10-Gb/s operation, in the presence of 250 fF capacitance at the TIA input, representative of typical CMOS photodiode capacitance. The transimpedance gain of the single-stage TIA is 50 dBΩ, and the group-delay variation is less than ±19 ps over the 3-dB bandwidth. The circuit occupies an active area of 180 μm×90 μm and consumes 7 mW from a 1.5-V supply. The measured average input-referred current noise of the TIA is 31 pA/√{Hz}. Simulations and analysis show that the proposed single-stage TIA architecture is capable of achieving improvement in the transimpedance limit over a single-stage RGC TIA designed for the same data rate and the same input photodiode capacitance. A comparison of measurement results to published TIAs also demonstrates the competitive performance of the proposed TIA in terms of the TIA transimpendance gain, bandwidth, area, and power consumption.

\mu{\rm m}

This brief presents a novel wide-bandwidth second-order voltage-mode all-pass filter derived from a canonical single transistor bandpass filter. The core of the circuit consists of only one transistor, two resistors, and two energy storage elements. The operation of the proposed filter is validated experimentally. A filter implemented in an IBM 0.13-μm CMOS was measured to have a 55-ps group delay across a 6-GHz bandwidth while consuming 18.5 mW from a 1.5-V supply. This work experimentally demonstrates a CMOS all-pass filter that operates at multigigahertz frequencies and achieves the highest delay-bandwidth product compared to previously published CMOS all-pass filters known to the authors.

CMOS Inductorless Modified-RGC Transimpedance Amplifier

A CMOS wide-bandwidth first-order current-mode all-pass filter (APF) is discussed. The circuit consists of one transistor, a resistor, a grounded inductor, and a load. When used with a current mirror as the load, the current-mode filter exhibits a high output impedance, which is advantageous from an integration point of view and enables this configuration to be cascaded with current-mode circuits. The operation of the proposed circuit is experimentally validated. The APF implemented in IBM 0.13-μm CMOS was measured to have the pole-zero pair located at 8.32 GHz and to achieve a 55 ps group delay while consuming 19 mW from a 1.5-V supply. This paper experimentally demonstrates a CMOS APF that operates at multi-GHz frequencies and achieves the highest delay-bandwidth products of the published CMOS first-order APFs known to the authors.

A New Second-Order All-Pass Filter in 130-nm CMOS

This paper presents new approaches for realizing high quality factor continuous-time asymmetric-slope second-order band-pass filters based on concepts of fractional-order filters. Two non-conventional transfer functions and two possible circuits, one based on a floating Frequency Dependent Negative Resistor (FDNR) and one based on a floating inductor both using a fractional capacitor, are proposed. Examples of active filter design are supported by PSPICE simulations and experimental results. Furthermore, a Field Programmable Analog Array (FPAA) realization is also presented.

A 0.13-

A new transimpedance amplifier (TIA) design procedure using stagger tuning with inverted transformer coils is described in this paper. A broadband TIA, realized using the proposed staggered design technique that enhances the transimpedance limit and the bandwidth while only adding small passband gain ripple, was implemented in a 0.13-μm standard CMOS process. The TIA achieves a 3-dB bandwidth of 33 GHz with a 150 fF photodiode capacitance. The TIA transimpedance gain is 43.8 dBQ with ±8 ps group-delay variation over the entire bandwidth. The circuit occupies an active area of 250 μm × 260 μm and consumes 9 mW from a 2 V supply. Despite operating with much larger photodiode capacitance, the TIA achieves the highest figure of merit, and occupies smaller area while consuming the least amount of power among previously published TIAs designed for the same data rate in similar technologies.

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A 0.96-to-5.1GHz 4-element antenna array is described. The beamformer is designed in 0.13-μm CMOS using a delay-and-sum (DAS) architecture enhanced with a spatially analog IIR filter for sidelobe reduction. The DAS portion is based on a novel delay element that provides 82-ps delay range and consumes 6.15 mW of power. The beamformer circuit is measured to achieve sidelobe levels of −22 dBc, which is a 10-dB improvement over prior art.

m CMOS Current-Mode All-Pass Filter for Multi-GHz Operation

A broadband RF delay-and-sum (DAS) beamformer, which employs wide-band CMOS all-pass filters for achieving the desired time delays, is discussed in this work. The use of all-pass filters eliminates the need of I/Q mixers and transmission line-based delay stages used in the previously reported DAS beamformers. The proposed all-pass filter can achieve approximately linear-phase delay across GHz-range of frequencies, which is amendable for wide-band beamforming. The delay-and-sum section of the beamformer was designed and simulated for an array of 4 antennas, with the desired signal direction of arrival of 11° from broadside direction. The performance of the wide-band DAS beamformer is obtained with simulations in IBM 130-nm CMOS technology. Moreover, experimental results for the main building block of the circuit, the voltage-mode all-pass filter with the nominal 33 ps delay, are given to strengthen the feasibility of physical implementation of such a beamformer.

Band-pass filters with high quality factors and asymmetric-slope characteristics

A new technique using parallel current-based circuits and resistive compensation to realize an inductorless transimpedance amplifier (TIA) with enhanced bandwidth is introduced. An example TIA implemented in 0.13¼m 1.2V standard CMOS achieves 3dB bandwidth of 11.2GHz when driven by a large 500fF photodiode capacitance. This design enhances the bandwidth by a factor of 3.86 with less than 0.1dB gain ripple, achieving the highest figure of merit among published 20Gb/s inductorless 0.13μm CMOS designs for short-haul applications.

A Stagger-Tuned Transimpedance Amplifier

An analog all-pass filter based transfer function synthesis method is proposed for realizing multifunctional microwave active circuits. An analog realization is obtained by replacing unit sample delays in an existing digital prototype with a second-order all-pass analog filter. A novel space time array processor (STAP) and a frequency and bandwidth agile multi-band filter have been simulated using the proposed transfer function synthesis method using measured S- parameters of a fabricated 130 nm second-order CMOS all- pass filter. Simulated array patterns of the STAP beamformer show improved side-lobe performance for better interference suppression and noise rejection. The tunability of the multi-band analog filter, in terms of the center frequency and the quality factor, is verified up to 8 GHz, which has potential applications in analog microwave front-ends.