Philipp Graf

A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures

Graphical modeling languages allow to specify structure and behavior of mixed hardware-and software-systems on high abstraction level and can be automatically rendered into deployable implementations. In this paper we extend a model-based development process by means to debug functionality specified using Matlab Stateflow models in its hardware-and software-implementation on the target system. The user can control and view the system state graphically from the models level. We introduce an Eclipse based software-tool based on our approach and apply it to a dynamically reconfigurable slot-based FPGA runtime environment.

Gaining Insight into Executable Models during Runtime: Architecture and Mappings

An extension to a seamless, model-based development approach provides an architecture for debugging models that execute on target systems or in dedicated rapid-prototyping environments. During development, the ever-increasing design complexity of embedded systems frequently comes into conflict with cost, time-to-market, and quality. This complexity results from increasing functionality, the expanding design space, the distribution of functionality to distributed control units, the optimization of power dissipation, and performance requirements. As complexity increases, the development focus shifts from electronic and pure control-based systems toward software-based systems. The embedded-software development community is increasingly accepting the object-oriented paradigm, and a growing number of graphical tools for computer-aided systems and software engineering (CASE) support it. Relevant notations include the Unified Modeling Language (UML), statecharts, and signalflow-based modeling. In this article, we briefly describe our development process for specifying software targeted at embedded systems according to different modeling domains and transforming it to an executable binary thats appropriate for rapid prototyping

Dynamic Mapping of Runtime Information Models for Debugging Embedded Software

Model based development based on different domain specific tools and graphical notations gains increasing importance in system design of embedded electronic systems allowing fast concept-oriented prototyping from model to code. This paper describes an extension to our seamless model based development approach: An architecture for debugging models that are executed on target systems or in dedicated rapid-prototyping environments. We discuss the advantages of such an approach as opposed to simulation and describe our universal architecture. We focus on the definition of MOF-based runtime models and their synchronisation with the runtime target state. An example of debugging state-charts shows the feasibility of the approach

Nonintrusive Black- and White-Box Testing of Embedded Systems Software against UML Models

We extend a model based development approach for software components of embedded systems by a model based testing framework. We motivate by describing challenges a developer has to face when developing embedded software and present as a solution an UML-centric development approach. We introduce a testing framework that allows specification of test cases for UML class models using UML sequence- and use-case-diagrams. These test cases define participating objects and their messages including parameters, loops, control structures, inclusion of other collaborations and time constraints. These diagrams are verified against the real system-response of the software under test. We employ a commercial in-circuit emulator to record method calls, object identities and their parameters on C source-code level as messages with minimal impact on system performance and map these back to model level to verify them against the specified model.

SPP1148 booth: Fine grain reconfigurable architectures

In this booth on fine grain reconfigurable architectures, several research groups demonstrate their joint work on operating concepts for managing dynamic and partial reconfiguration, visualization of bitstreams and routing, presenting an application applying dynamic reconfiguration for video engines as well as work on minimization of reconfiguration data. Unique is that all the above four projects present their work using the same reconfigurable FPGA-based fabric called Erlangen slot machine that has also been built within one project just the purpose of experimenting with dynamic fine grain reconfiguration as an interdisciplinary platform.

ModelScope: inspecting executable models during run-time

This paper presents a software tool called ModelScope which is a co-debugging platform that, during run-time, allows insight into a model running on various different target systems with different views and diagrams for different aspects of the run-time state.

Towards a platform for debugging executed UML-models in embedded systems

Automated transformations from model to executable code require new appropriate model-based ways for debugging and monitoring such models directly on an embedded target platform. We propose an architecture that allows the definition of various debugging-scenarios and -views independent of the actual execution-platform. This architecture is utilized to explore new approaches for assisting the developer in finding faults in the system he is developing.

Automatisierte Modellkopplung heterogener eingebetteter Systeme

Heterogene eingebettete elekt ronische Systeme unterliegen harten Anforderungen insbesondere bezuglich Kosten, Time-to-Market, und Qualitat, bei gleichzeitig immer komplexer werdendem Entwurfsraum. Eine mogliche Antwort auf dieser Herausforderung ist der modellbasierte Entwurf mit anschliesender Quellcodegenerierung. Bei der effizienten Modellierung eingebetteter elektronischer Systeme kommen mehrere Sprachen zum Einsatz, welche eine vollst andige Modellierung ermoglichen. Es werden dabei mehrere CASE-Werkzeuge eingesetzt, wie z.B. MathWorks MATLAB/S imulink, ARTiSAN Real-timeStudio oder i-Logix Statemate. Dieser Beitrag konzent riert sich auf die Kopplung der in verschiedenen Notationen entwickelten Modelle. Dies geschieht mit Hilfe eines Kopplungsmodells, welches aus einem UML Vorlagenmodell generiert wird. Der vorgeste llte Ansatz ist in der Integrationsplattform GeneralStore, welche die CASE Werkzeuge integriert und ein MOF1-Repository zur Modellverwaltung hat, implementiert.

Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies

Self-reconfiguration and adaptivity are important new concepts for reconfigurable hardware. The benefits include, for example, a reduction in power dissipation by sharing resources therefore requiring smaller reconfigurable chips. Idle applications are substituted on demand by actually needed functions. As a result, the number of possible functions controlled by such systems increases without raising the number of additionally required processing elements. Parallel tasks (functions) in hardware execute more efficiently compared with sequential microprocessors. The high performance of reconfigurable hardware and the possibility of hardware parallelization, help to overcome increasing problems of data processing with traditional microcontroller and microprocessors in future complex electronic systems. A relevant issue is the use of adaptive reconfigurable systems in real-time applications, which is one of the basic conditions for a variety of target applications. New approaches to create systems, which are able to manage their own configuration are called run-time systems. These systems use the flexibility of e.g. an FPGA by partially changing the configuration. Only the necessary functions are configured in the chip’s memory. On demand one or more functions can be substituted by another while other parts stay operative. The ALadyn project targets exactly this kind of adaptive system approach and investigates in the physical hardware realization, system modeling and development tools.