Philippe Poure

FPGA-Based Real-Time Power Converter Failure Diagnosis for Wind Energy Conversion Systems

This paper discusses the design, implementation, experimental validation, and performances of a field-programmable gate array (FPGA)-based real-time power converter failure diagnosis for three-leg fault tolerant converter topologies used in wind energy conversion systems (WECSs). The developed approach minimizes the time interval between the fault occurrence and its diagnosis. We demonstrated the possibility to detect a faulty switch in less than 10 mus by using a diagnosis simultaneously based on a ldquotime criterionrdquo and a ldquovoltage criterion.rdquo To attain such a short detection time, an FPGA fully digital implementation is used. The performances of the proposed FPGA-based fault detection method are evaluated for a new fault tolerant back-to-back converter topology suited for WECS with doubly fed induction generator (DFIG). We examine the failure diagnosis method and the response of the WECS when one of the power switches of the fault tolerant back-to-back converter is faulty. The experimental failure diagnosis implementation based on ldquoFPGA in the looprdquo hardware prototyping verifies the performances of the fault tolerant WECS with DFIG.

FPGA-Based Reconfigurable Control for Fault-Tolerant Back-to-Back Converter Without Redundancy

In this paper, an FPGA-based fault-tolerant back-to-back converter without redundancy is studied. Before fault occurrence, the fault-tolerant converter operates like a conventional back-to-back six-leg converter, and after the fault, it becomes a five-leg converter. Design, implementation, and experimental verification of an FPGA-based reconfigurable control strategy for this converter are discussed. This reconfigurable control strategy allows the continuous operation of the converter with minimum affection from a fault in one of the semiconductor switches. A very fast detection scheme is used to detect and locate the fault. Implementation of the fault detection and of the fully digital control schemes on a single FPGA is realized, based on a suited methodology for rapid prototyping. FPGA in loop and also experimental tests are carried out, and the results are presented. These results confirm the capability of the proposed reconfigurable control and fault-tolerant structure.

Open- and Short-Circuit Switch Fault Diagnosis for Nonisolated DC–DC Converters Using Field Programmable Gate Array

Fault detection (FD) in power electronic converters is necessary in embedded and safety critical applications to prevent further damage. Fast FD is a mandatory step in order to make a suitable response to a fault in one of the semiconductor devices. The aim of this study is to present a fast yet robust method for fault diagnosis in nonisolated dc-dc converters. FD is based on time and current criteria which observe the slope of the inductor current over the time. It is realized by using a hybrid structure via coordinated operation of two FD subsystems that work in parallel. No additional sensors, which increase system cost and reduce reliability, are required for this detection method. For validation, computer simulations are first carried out. The proposed detection scheme is validated on a boost converter. Effects of input disturbances and the closed-loop control are also considered. In the experimental setup, a field programmable gate array digital target is used for the implementation of the proposed method, to perform a very fast switch FD. Results show that, with the presented method, FD is robust and can be done in a few microseconds.

Current Sensor Fault-Tolerant Control for WECS With DFIG

The performances of wind energy conversion systems (WECS) heavily depend on the accurate current sensing. A sudden failure in one of the current sensors decreases the system performances. Moreover, if a fault is not detected and handled quickly, its effect leads to system disconnection. Hence, to reduce the failure rate and to prevent unscheduled shutdown, a real-time fault detection, isolation, and compensation scheme could be adopted. This paper introduces a new field-programmable-gate-array (FPGA)-based grid-side-converter current sensor fault-tolerant control for WECS with doubly fed induction generator. The proposed current sensor fault detection is achieved by a predictive model. ldquoFPGA-in-the-looprdquo and experimental results validate the effectiveness and satisfactory performances of the proposed method.

An HIL-Based Reconfigurable Platform for Design, Implementation, and Verification of Electrical System Digital Controllers

This paper presents a top-down design flow for design, implementation, and verification of digital controllers associated with electrical systems. In the proposed design flow, the functional description of the studied system and the detailed electronic hardware design and validation of the digital controller are performed using a hardware-in-the-loop (HIL)-based reconfigurable platform in a unique design environment. The way of using this design flow and the reconfigurable HIL platform is analyzed through a fault-tolerant shunt active power filter application. The experimental results obtained with a laboratory prototype fault-tolerant active filter demonstrate the performances and the efficiency of the proposed design flow and HIL-based reconfigurable platform.

CMOS microsystem for AC current measurement with galvanic isolation

In this paper, we present an integrated AC current sensor based on sensitivity-optimised horizontal Hall effect devices (HHDs) and a differential readout chain. It has been designed for 5A nominal AC current measurement with 5 kV galvanic isolation and 0.5% accuracy over 1.5 kHz bandwidth, which allows up to 30/sup th/ (25 th) harmonic detection in 50 Hz (60 Hz) applications. From the sensing element to the instrumental chains output the signal conditioning is exclusively performed by low-noise standard CMOS analog blocks. Moreover the whole microsystem features a mixed signal structure dedicated to auto-balancing.

Photovoltaic Systems Reliability Improvement by Real-Time FPGA-Based Switch Failure Diagnosis and Fault-Tolerant DC–DC Converter

The increased penetration of photovoltaic (PV) systems in different applications with critical loads such as in medical applications, industrial control systems, and telecommunications has highlighted pressing needs to address reliability and service continuity. Recently, distributed maximum power point tracking architectures, based on dc-dc converters, are being used increasingly in PV systems. Nevertheless, dc-dc converters are one of the important failure sources in a PV system. Since the semiconductor switches are one of the most critical elements in these converters, a fast switch fault detection method (FDM) is a mandatory step to guarantee the service continuity of these systems. This paper proposes a very fast FDM based on the shape of the inductor current associated to fault-tolerant (FT) operation for boost converter used in PV systems. By implementing fault diagnosis and reconfiguration strategies on a single field-programmable gate array target, both types of switch failure (open- and short-circuit faults) can be detected, identified and handled in real time. The FDM uses the signal provided by the current sensor dedicated to the control of the system. Consequently, no additional sensor is required. The proposed FT topology is based on a redundant switch. The results of hardware-in-the-loop and experimental tests, which all confirm the excellent performances of the proposed approach, are presented and discussed. The obtained results show that a switch fault can be detected in less than one switching period, typically around 100 ms in medium power applications, by the proposed FDM.

FPGA-Based Fast Detection With Reduced Sensor Count for a Fault-Tolerant Three-Phase Converter

Fast fault detection (FD) and reconfiguration is necessary for fault tolerant power electronic converters in safety critical applications to prevent further damage and to make the continuity of service possible. The aim of this study is to minimize the number of the used additional voltage sensors in a fault tolerant three-phase converter. In this paper, first a practical implementation of a very fast FD scheme with reduced sensor number is discussed. Then, an optimization in this scheme is also presented to decrease the detection time. For FD, special time and voltage criterion are applied to observe the error in the estimated phase-to-phase voltages for a specific period of time. The proposed optimization is based on the fact that following a detectable fault, two line-to-line voltages will deviate from their respective estimated values. Fault detection is studied for a three-leg two-level fault tolerant converter. Control and FD systems are implemented on a single field-programmable gate array. First, hardware in the loop experiments are carried out to evaluate the implemented schemes. Then, fully experimental tests are performed. The results confirm good performance of the proposed detection schemes, the digital controller and the fault tolerant structure. It is shown that such methods can detect and locate a fault in a few tens of microseconds. In certain cases the optimized scheme can be faster up to 50%, and in the other cases they have the same detection time.

Distributed Active Resonance Suppression in Hybrid DC Power Systems Under Unbalanced Load Conditions

Power-electronics-based hybrid dc power systems (HDCPSs) are increasingly used in many industrial applications such as land, sea, and air vehicles. In these systems, small dc-link and LC filter capacitors are of great interest for weight saving. Usually, in HDCPSs, there are constant power loads and negative dynamic impedance of these loads may generate unstable oscillations. Besides, the risk of resonance may be increased under unbalanced load conditions. In this paper, a distributed active oscillation suppression approach is presented. It is based on the analytical study of the linearized model of the studied system around the operating point. The studied system consists of one main dc source and one storage element supplying two loads: a permanent magnet synchronous motor connected to the dc link by a voltage source inverter and a resistive load supplied by a dc/dc converter through the same dc bus. The proposed approach is particularly used to overcome the resonance under unbalanced load conditions and allows reducing dc link and LC filter capacitors for weight saving. Simulations and experimentations are carried out which confirm the validity of the proposed approach.

Fault-Tolerant Five-Leg Converter Topology With FPGA-Based Reconfigurable Control

Fast fault detection and reconfiguration of power converters is necessary in electrical drives to prevent further damage and to make the continuity of service possible. On the other hand, component minimized converters may provide the benefits of higher reliability and less volume and cost. In this paper, a new fault-tolerant converter topology is studied. This converter has five legs before the fault occurrence, and after fault detection the converter continues to function with four legs. A very fast fault detection and reconfiguration scheme is presented and studied. Simulations and experimental tests are performed to evaluate the structure requirements, the digital reconfigurable controller, and fault detection scheme. For experimental tests, the control and the fault detection and reconfiguration schemes are implemented on a single field-programmable gate array (FPGA) chip. Experimental and simulation results show the effectiveness of the proposed fault-tolerant topology and its FPGA-based control.